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docs cc6902so-10a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers cc6902so-10a: viewers · Ray 1mo ago
cc6902so-10a-etched.fit.json cc6902so-10a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
cc6902so-10a-etched.glb cc6902so-10a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
cc6902so-10a-etched.step cc6902so-10a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
cc6902so-10a.glb Publish 0.1.0 · Ray 1mo ago
cc6902so-10a.kicad_mod Publish 0.1.0 · Ray 1mo ago
cc6902so-10a.kicad_sym Publish 0.1.0 · Ray 1mo ago
cc6902so-10a.lbr Publish 0.1.0 · Ray 1mo ago
cc6902so-10a.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md cc6902so-10a: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

CC6902SO-10A

Cross chip · Current Sensors · SOP-8

CC6902SO-10A from Cross chip, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Positive terminal of the integrated primary current-sensing conductor. Pins 1 and 2 are tied together internally and must be connected together on the PCB to carry the sampled current into the sensor. Galvanically isolated (2000 Vrms) from the signal-side pins.
2 IP+ passive Positive terminal of the integrated primary current-sensing conductor. Internally shorted to pin 1; both pads should be joined on the PCB to increase current-carrying capacity.
3 IP- passive Negative terminal of the integrated primary current-sensing conductor. Internally shorted to pin 4; both pads should be joined on the PCB to carry the sampled current out of the sensor.
4 IP- passive Negative terminal of the integrated primary current-sensing conductor. Internally shorted to pin 3; both pads should be joined on the PCB to increase current-carrying capacity.
5 GND power_in Device signal ground reference for the internal Hall front-end and analog output stage.
6 NC unconnected No internal connection. Must be left floating (需悬空) - do not tie to any net.
7 OUT output Ratiometric analog output. Idles at VCC/2 (~2.5 V at VCC = 5 V) with zero primary current, and swings linearly with sensed current at 200 mV/A for the -10A variant (0.5 V to 4.5 V full-scale swing). Single-ended output.
8 VCC power_in Supply input for the signal-side circuitry. Nominal 5 V operating supply; a decoupling capacitor to GND is recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Cross chip
Package SOP-8
Category Sensor
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • CC6902SO-10A

CAD (KiCad official)

  • Symbol: CC6902SO-10A
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cc6902so-10a-etched.step / cc6902so-10a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc6902so-10a.step / cc6902so-10a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cross chip datasheet (3 pp, sha256 bd4558c14185b3b8, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF