CC6900SO-10A
Public Made by Adomby adom
Cross chip Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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| cc6900so-10a-etched.step | 3d ago |
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CC6900SO-10A
Cross chip · Current Sensors · SOP-8
CC6900SO-10A from Cross chip, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Positive terminal of the sampled current path (primary conductor input). Tied internally to pin 2. Isolated from the signal pins by 100 V. |
| 2 | IP+ | passive | Positive terminal of the sampled current path (primary conductor input). Tied internally to pin 1. |
| 3 | IP- | passive | Negative terminal of the sampled current path (primary conductor output). Tied internally to pin 4. |
| 4 | IP- | passive | Negative terminal of the sampled current path (primary conductor output). Tied internally to pin 3. |
| 5 | GND | power_in | Signal ground / device ground reference. Isolated from the IP+/IP- current path by 100 V. |
| 6 | NC | unconnected | No connect. Datasheet specifies this pin must be left floating (需悬空). |
| 7 | OUT | output | Single-ended analog output. Quiescent (zero-field) output is 50% VCC; swings 0.5 V to 4.5 V at VCC = 5 V, ratiometric with the sensed current at 200 mV/A for the 10 A variant. |
| 8 | VCC | power_in | Supply voltage input, nominally 5 V. Sets the ratiometric output range (0.5 V to 4.5 V typical at VCC = 5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Cross chip |
| Package | SOP-8 |
| Category | Sensor |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
CC6900SO-10A
CAD (KiCad official)
- Symbol:
CC6900SO-10A - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
cc6900so-10a-etched.step/cc6900so-10a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cc6900so-10a.step/cc6900so-10a.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
cc6900so-10a.step |
122 KB | You want the bare part, or you mark your own boards. |
cc6900so-10a-etched.step |
2.7 MB | You want the part with CC6900SO-10A already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 639 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Cross chip datasheet (3 pp, sha256
e459878df789bbd5, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).