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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	cc6103st: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
viewers	pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray	1mo ago
cc6103st-etched.fit.json	cc6103st: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc6103st-etched.glb	cc6103st: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc6103st-etched.step	cc6103st: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc6103st.glb	cc6103st: factory component page (tier=lcsc) · Ray	1mo ago
cc6103st.kicad_mod	cc6103st: factory component page (tier=lcsc) · Ray	1mo ago
cc6103st.kicad_sym	cc6103st: factory component page (tier=lcsc) · Ray	1mo ago
cc6103st.lbr	rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 3 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray	1mo ago
cc6103st.step	cc6103st: factory component page (tier=lcsc) · Ray	1mo ago
package.json	Publish 0.2.0 · Ray	1mo ago
pads.json	pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray	1mo ago
page.json	Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray	11d ago
README.md	cc6103st: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	18d ago

CC6103ST

Cross chip · Hall Sensor · SOT-23

CC6103ST from Cross chip, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Supply voltage input, 2.5 V to 5.5 V operating range (absolute max -0.3 V to 5.5 V). Typical quiescent current 2 mA at 5.0 V. A bypass capacitor to GND is recommended.
2	VOUT	output	Latching digital output from the Hall comparator with current-limited push-pull power stage. Sinks/sources up to 50 mA into a resistive load with VSAT <= 0.4 V at 50 mA. Rise time ~1.0 us and fall time ~2.5 us with RL=820 ohm, CL=10 pF.
3	GND	power_in	Ground reference for the supply and output stage.

Key specifications

Parameter	Value
Manufacturer	Cross chip
Package	SOT-23
Category	Sensor
Pins	3

Ordering variants

CC6103ST
CC6103STTO

CAD (KiCad official)

Symbol: CC6103ST
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23 (KiCad packages3D, STEP)
3D model files: cc6103st-etched.step / cc6103st-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc6103st.step / cc6103st.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cc6103st.step`	59 KB	You want the bare part, or you mark your own boards.
`cc6103st-etched.step`	1.7 MB	You want the part with `CC6103ST` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 408 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Cross chip datasheet (6 pp, sha256 ade86bde5538c664, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF