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CC430F5147IRGZR
Public Made by Adomby adom
Texas Instruments RF Transceiver ICs, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCC430F5147IRGZR
Texas Instruments · RF Transceiver ICs · QFN-48-EP(7x7)
CC430F5147IRGZR from Texas Instruments, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P2.2/PM_TA1CCR1A/CB2/A2 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default TA1 CCR1 compare output or capture input), also Comparator_B input CB2 and 10-bit ADC analog input A2 on CC430F514x. |
| 2 | P2.1/PM_TA1CCR0A/CB1/A1 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default TA1 CCR0 compare output or capture input), also Comparator_B input CB1 and 10-bit ADC analog input A1 on CC430F514x. |
| 3 | P2.0/PM_CBOUT1/PM_TA1CLK/CB0/A0 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Comparator_B output or TA1 clock input), also Comparator_B input CB0 and 10-bit ADC analog input A0 on CC430F514x. |
| 4 | P1.7/PM_UCA0CLK/PM_UCB0STE | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_A0 clock input/output, and the mapped USCI_B0 SPI slave transmit enable input (see review note on the printed name). |
| 5 | P1.6/PM_UCA0TXD/PM_UCA0SIMO | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_A0 UART transmit data or USCI_A0 SPI slave-in/master-out. |
| 6 | P1.5/PM_UCA0RXD/PM_UCA0SOMI | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_A0 UART receive data or USCI_A0 SPI slave-out/master-in. |
| 7 | VCORE | power_out | Regulated core power supply (PMM core voltage); absolute maximum voltage on this pin is -0.3 V to 2.0 V referenced to VSS. |
| 8 | DVCC | power_in | Digital power supply; recommended supply range 1.8 V to 3.6 V and should be sourced from the same supply as AVCC (maximum 0.3 V difference tolerated). |
| 9 | P1.4/PM_UCB0CLK/PM_UCA0STE | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_B0 clock input/output or USCI_A0 SPI slave transmit enable. |
| 10 | P1.3/PM_UCB0SIMO/PM_UCB0SDA | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_B0 SPI slave-in/master-out or USCI_B0 I2C data. |
| 11 | P1.2/PM_UCB0SOMI/PM_UCB0SCL | bidirectional | General-purpose digital I/O with port interrupt; default mapping is USCI_B0 SPI slave-out/master-in or USCI_B0 I2C clock. |
| 12 | P1.1/PM_RFGDO2 | bidirectional | General-purpose digital I/O with port interrupt; default mapping is Radio GDO2 output. |
| 13 | P1.0/PM_RFGDO0 | bidirectional | General-purpose digital I/O with port interrupt; default mapping is Radio GDO0 output. |
| 14 | P3.7/PM_SMCLK | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is SMCLK output. |
| 15 | P3.6/PM_RFGDO1 | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is Radio GDO1 output. |
| 16 | P3.5/PM_TA0CCR4A | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is TA0 CCR4 compare output or capture input. |
| 17 | P3.4/PM_TA0CCR3A | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is TA0 CCR3 compare output or capture input. |
| 18 | P3.3/PM_TA0CCR2A | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is TA0 CCR2 compare output or capture input. |
| 19 | P3.2/PM_TA0CCR1A | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is TA0 CCR1 compare output or capture input. |
| 20 | P3.1/PM_TA0CCR0A | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is TA0 CCR0 compare output or capture input. |
| 21 | P3.0/PM_CBOUT0/PM_TA0CLK | bidirectional | General-purpose digital I/O with mappable secondary function; default mapping is Comparator_B output or TA0 clock input. |
| 22 | DVCC | power_in | Digital power supply; recommended supply range 1.8 V to 3.6 V. |
| 23 | P2.7/PM_ADC10CLK/PM_DMAE0 | bidirectional | General-purpose digital I/O with port interrupt; default mapping is ADC10CLK output or DMA external trigger input. |
| 24 | P2.6/PM_ACLK | bidirectional | General-purpose digital I/O with port interrupt; default mapping is ACLK output. |
| 25 | RF_XIN | input | Input terminal for the RF crystal oscillator, or external clock input. |
| 26 | RF_XOUT | output | Output terminal for the RF crystal oscillator. |
| 27 | AVCC_RF | power_in | Radio analog power supply. |
| 28 | AVCC_RF | power_in | Radio analog power supply. |
| 29 | RF_P | bidirectional | Positive RF input to the LNA in receive mode and positive RF output from the PA in transmit mode; maximum input RF level at RF_P and RF_N is 10 dBm. |
| 30 | RF_N | bidirectional | Negative RF input to the LNA in receive mode and negative RF output from the PA in transmit mode; maximum input RF level at RF_P and RF_N is 10 dBm. |
| 31 | AVCC_RF | power_in | Radio analog power supply. |
| 32 | AVCC_RF | power_in | Radio analog power supply. |
| 33 | R_BIAS | passive | External bias resistor for the radio reference current; absolute maximum voltage on this pin is -0.3 V to 2.0 V referenced to VSS. |
| 34 | GUARD | power_in | Power supply connection for digital noise isolation. |
| 35 | PJ.0/TDO | bidirectional | General-purpose digital I/O; test data output port. |
| 36 | PJ.1/TDI/TCLK | bidirectional | General-purpose digital I/O; test data input or test clock input. |
| 37 | PJ.2/TMS | bidirectional | General-purpose digital I/O; test mode select. |
| 38 | PJ.3/TCK | bidirectional | General-purpose digital I/O; test clock. |
| 39 | TEST/SBWTCK | input | Test mode pin that selects digital I/O on the JTAG pins; also the Spy-Bi-Wire input clock. |
| 40 | RST/NMI/SBWTDIO | bidirectional | Reset input, active low; nonmaskable interrupt input; and Spy-Bi-Wire data input/output. |
| 41 | DVCC | power_in | Digital power supply; recommended supply range 1.8 V to 3.6 V. |
| 42 | AVSS | power_in | Analog ground supply for ADC10. |
| 43 | P5.1/XOUT | bidirectional | General-purpose digital I/O; output terminal of crystal oscillator XT1 in crystal mode. |
| 44 | P5.0/XIN | bidirectional | General-purpose digital I/O; input terminal for crystal oscillator XT1. |
| 45 | AVCC | power_in | Analog power supply. |
| 46 | P2.5/PM_SVMOUT/CB5/A5/VREF+/VeREF+ | bidirectional | General-purpose digital I/O with port interrupt; default mapping is SVM output, also Comparator_B input CB5, ADC10 analog input A5, and positive ADC reference terminal VREF+/VeREF+ on CC430F514x. |
| 47 | P2.4/PM_RTCCLK/CB4/A4/VeREF- | bidirectional | General-purpose digital I/O with port interrupt; default mapping is RTCCLK output, also Comparator_B input CB4, ADC10 analog input A4, and negative ADC reference terminal VeREF- on CC430F514x. |
| 48 | P2.3/PM_TA1CCR2A/CB3/A3 | bidirectional | General-purpose digital I/O with port interrupt; default mapping is TA1 CCR2 compare output or capture input, also Comparator_B input CB3 and 10-bit ADC analog input A3 on CC430F514x. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-48-EP(7x7) |
| Category | RF And Wireless |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
CC430F5147IRGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
cc430f5147irgzr-etched.step/cc430f5147irgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cc430f5147irgzr.step/cc430f5147irgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (131 pp, sha256
90bb4f2ae90704af, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).