component
CC2545RGZR
Public Made by Adomby adom
Texas Instruments RF Transceiver ICs, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 20d ago |
| viewers | 20d ago |
| cc2545rgzr-etched.glb | 20d ago |
| cc2545rgzr-etched.step | 20d ago |
| cc2545rgzr-hero.glb | 20d ago |
| cc2545rgzr-hero.overlay.json | 20d ago |
| cc2545rgzr.glb | 20d ago |
| cc2545rgzr.kicad_mod | 20d ago |
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| cc2545rgzr.lbr | 20d ago |
| cc2545rgzr.step | 20d ago |
| package.json | 20d ago |
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| README.md | 20d ago |
CC2545RGZR
Texas Instruments · RF Transceiver ICs · VQFN-48-EP(7x7)
CC2545RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3_3 | bidirectional | Port 3.3 general-purpose digital I/O pin. |
| 2 | P3_2 | bidirectional | Port 3.2 general-purpose digital I/O pin. |
| 3 | P3_1 | bidirectional | Port 3.1 general-purpose digital I/O pin. |
| 4 | P3_0 | bidirectional | Port 3.0 general-purpose digital I/O pin. |
| 5 | P2_3 | bidirectional | Port 2.3 general-purpose digital I/O pin. |
| 6 | P2_2 | bidirectional | Port 2.2 general-purpose digital I/O pin. |
| 7 | P2_1 | bidirectional | Port 2.1 general-purpose digital I/O pin. |
| 8 | P2_0 | bidirectional | Port 2.0 general-purpose digital I/O pin. |
| 9 | P0_7 | bidirectional | Port 0.7 general-purpose digital I/O pin. |
| 10 | P0_6 | bidirectional | Port 0.6 general-purpose digital I/O pin. |
| 11 | P0_5 | bidirectional | Port 0.5 general-purpose digital I/O pin. |
| 12 | P0_4 | bidirectional | Port 0.4 general-purpose digital I/O pin. |
| 13 | P0_3 | bidirectional | Port 0.3 general-purpose digital I/O pin. |
| 14 | P0_2 | bidirectional | Port 0.2 general-purpose digital I/O pin. |
| 15 | P0_1 | bidirectional | Port 0.1 general-purpose digital I/O pin. |
| 16 | P0_0 | bidirectional | Port 0.0 general-purpose digital I/O pin. |
| 17 | P2_7 | bidirectional | Port 2.7 general-purpose digital I/O pin. |
| 18 | P2_6 | bidirectional | Port 2.6 general-purpose digital I/O pin. |
| 19 | P2_5 | bidirectional | Port 2.5 general-purpose digital I/O pin. |
| 20 | P2_4 | bidirectional | Port 2.4 general-purpose digital I/O pin. |
| 21 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 22 | RESET_N | input | Reset input, active-low. |
| 23 | P1_4/DC | bidirectional | Port 1.4 digital I/O, also the debug clock (DC) pin. |
| 24 | P1_3/DD | bidirectional | Port 1.3 digital I/O, also the debug data (DD) pin. |
| 25 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 26 | XOSC_Q1 | passive | 32-MHz crystal oscillator pin 1, or external-clock input. |
| 27 | XOSC_Q2 | passive | 32-MHz crystal oscillator pin 2. |
| 28 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 29 | VSS | power_in | Unused pin; connect to ground. |
| 30 | RF_P | passive | Positive RF input to the LNA during RX and positive RF output from the PA during TX. |
| 31 | RF_N | passive | Negative RF input to the LNA during RX and negative RF output from the PA during TX. |
| 32 | VSS | power_in | Unused pin; connect to ground. |
| 33 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 34 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 35 | RBIAS | passive | External precision bias resistor for the reference current. |
| 36 | P1_6/XOSC32K_Q2 | bidirectional | Port 1.6 digital I/O, also the 32.768-kHz crystal oscillator pin 2. |
| 37 | P1_5/XOSC32K_Q1 | bidirectional | Port 1.5 digital I/O, also the 32.768-kHz crystal oscillator pin 1 or external-clock input. |
| 38 | P1_2 | bidirectional | Port 1.2 digital I/O with 20-mA drive strength. |
| 39 | P1_1 | bidirectional | Port 1.1 digital I/O with 20-mA drive strength. |
| 40 | P1_0 | bidirectional | Port 1.0 digital I/O with 20-mA drive strength. |
| 41 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 42 | DCPL1 | power_out | 1.8-V digital power-supply decoupling pin; do not use for supplying external circuits. |
| 43 | VDD | power_in | 2-V to 3.6-V analog power-supply connection. |
| 44 | VSS | power_in | Unused pin; connect to ground. |
| 45 | P3_7 | bidirectional | Port 3.7 general-purpose digital I/O pin. |
| 46 | P3_6 | bidirectional | Port 3.6 general-purpose digital I/O pin. |
| 47 | P3_5 | bidirectional | Port 3.5 general-purpose digital I/O pin. |
| 48 | P3_4 | bidirectional | Port 3.4 general-purpose digital I/O pin. |
| 49 | VSS | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | RF And Wireless |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
CC2545RGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
cc2545rgzr-etched.step/cc2545rgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cc2545rgzr.step/cc2545rgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
acb1329a8f0dd579, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).