component
CC2544RHBR
Public Made by Adomby adom
Texas Instruments RF Transceiver ICs, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+70@@ -0,0 +1,70 @@+# CC2544RHBR++**Texas Instruments** · RF Transceiver ICs · VQFN-32-EP(5x5)++CC2544RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | USB_P | bidirectional | USB D+ line of the full-speed USB 2.0 module, with internal pull-up for D+. |+| 2 | USB_N | bidirectional | USB D- line of the full-speed USB 2.0 module. |+| 3 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 4 | DCPL2 | passive | 3.3-V regulator decoupling pin. |+| 5 | VBUS | power_in | 5-V power input for the optional on-chip 5 V to 3.3 V regulator, operating range 4 V to 5.45 V. |+| 6 | P1_0 | bidirectional | General-purpose I/O port 1 bit 0 with 20 mA drive strength. |+| 7 | P1_1 | bidirectional | General-purpose I/O port 1 bit 1 with 20 mA drive strength. |+| 8 | VDD | power_in | IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 9 | P0_0 | bidirectional | General-purpose I/O port 0 bit 0. |+| 10 | P0_1 | bidirectional | General-purpose I/O port 0 bit 1. |+| 11 | VSS | power_in | Optional IOVSS ground pin. |+| 12 | VDD | power_in | IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 13 | P0_2 | bidirectional | General-purpose I/O port 0 bit 2. |+| 14 | P0_3 | bidirectional | General-purpose I/O port 0 bit 3. |+| 15 | RESET_N | input | Active-low reset input. |+| 16 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 17 | XOSC1 | input | 32-MHz crystal oscillator pin 1 or external-clock input. |+| 18 | XOSC2 | passive | 32-MHz crystal oscillator pin 2. |+| 19 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 20 | RF_P | bidirectional | Positive RF input to the LNA during RX and positive RF output from the PA during TX. |+| 21 | RF_N | bidirectional | Negative RF input to the LNA during RX and negative RF output from the PA during TX. |+| 22 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 23 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 24 | VDD | power_in | AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 25 | RBIAS | passive | External precision bias resistor connection for reference current. |+| 26 | VDD | power_in | AVDD_GUARD supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 27 | VSS | power_in | Optional IOVSS ground pin. |+| 28 | P1_2 | bidirectional | General-purpose I/O port 1 bit 2, also the debug clock. |+| 29 | P1_3 | bidirectional | General-purpose I/O port 1 bit 3, also the debug data. |+| 30 | VDD | power_in | IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins. |+| 31 | DCPL1 | passive | 1.8-V regulator decoupling pin. |+| 32 | VSS | power_in | USB ground pin. |+| 33 | VSS | power_in | Exposed thermal pad, must be connected to a solid ground plane as the main ground connection for the chip. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32-EP(5x5) |+| Category | RF And Wireless |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `CC2544RHBR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `cc2544rhbr-etched.step` / `cc2544rhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cc2544rhbr.step` / `cc2544rhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cc2544) (31 pp, sha256 `553344b3091742a9`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cc2544rhbr-datasheet.pdf)
page.jsonadded+312@@ -0,0 +1,312 @@+{+ "slug": "cc2544rhbr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments RF Transceiver ICs, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "rf and wireless",+ "cc2544rhbr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cc2544rhbr.kicad_sym",+ "cc2544rhbr.kicad_mod",+ "cc2544rhbr.glb",+ "cc2544rhbr.step",+ "cc2544rhbr.lbr",+ "docs/hero.png",+ "docs/cc2544rhbr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cc2544rhbr-hero.glb",+ "cc2544rhbr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CC2544RHBR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-32-EP(5x5)",+ "pin_count": 33,+ "category": "RF And Wireless",+ "subcategory": "RF Transceiver ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cc2544",+ "parts": {+ "symbol": "cc2544rhbr.kicad_sym",+ "footprint": "cc2544rhbr.kicad_mod",+ "model_3d": "cc2544rhbr-hero.glb",+ "model_3d_plain": "cc2544rhbr.glb",+ "model_3d_step": "cc2544rhbr-etched.step",+ "model_3d_step_plain": "cc2544rhbr.step",+ "lbr": "cc2544rhbr.lbr"+ },+ "distributor_links": {+ "lcsc": 2151515,+ "digikey": "296-39982-2-ND",+ "mouser": "595-CC2544RHBR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T05:30:29Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-39982-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CC2544RHBR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "USB_P",+ "type": "bidirectional",+ "description": "USB D+ line of the full-speed USB 2.0 module, with internal pull-up for D+."+ },+ {+ "number": "2",+ "name": "USB_N",+ "type": "bidirectional",+ "description": "USB D- line of the full-speed USB 2.0 module."+ },+ {+ "number": "3",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "4",+ "name": "DCPL2",+ "type": "passive",+ "description": "3.3-V regulator decoupling pin."+ },+ {+ "number": "5",+ "name": "VBUS",+ "type": "power_in",+ "description": "5-V power input for the optional on-chip 5 V to 3.3 V regulator, operating range 4 V to 5.45 V."+ },+ {+ "number": "6",+ "name": "P1_0",+ "type": "bidirectional",+ "description": "General-purpose I/O port 1 bit 0 with 20 mA drive strength."+ },+ {+ "number": "7",+ "name": "P1_1",+ "type": "bidirectional",+ "description": "General-purpose I/O port 1 bit 1 with 20 mA drive strength."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "9",+ "name": "P0_0",+ "type": "bidirectional",+ "description": "General-purpose I/O port 0 bit 0."+ },+ {+ "number": "10",+ "name": "P0_1",+ "type": "bidirectional",+ "description": "General-purpose I/O port 0 bit 1."+ },+ {+ "number": "11",+ "name": "VSS",+ "type": "power_in",+ "description": "Optional IOVSS ground pin."+ },+ {+ "number": "12",+ "name": "VDD",+ "type": "power_in",+ "description": "IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "13",+ "name": "P0_2",+ "type": "bidirectional",+ "description": "General-purpose I/O port 0 bit 2."+ },+ {+ "number": "14",+ "name": "P0_3",+ "type": "bidirectional",+ "description": "General-purpose I/O port 0 bit 3."+ },+ {+ "number": "15",+ "name": "RESET_N",+ "type": "input",+ "description": "Active-low reset input."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "17",+ "name": "XOSC1",+ "type": "input",+ "description": "32-MHz crystal oscillator pin 1 or external-clock input."+ },+ {+ "number": "18",+ "name": "XOSC2",+ "type": "passive",+ "description": "32-MHz crystal oscillator pin 2."+ },+ {+ "number": "19",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "20",+ "name": "RF_P",+ "type": "bidirectional",+ "description": "Positive RF input to the LNA during RX and positive RF output from the PA during TX."+ },+ {+ "number": "21",+ "name": "RF_N",+ "type": "bidirectional",+ "description": "Negative RF input to the LNA during RX and negative RF output from the PA during TX."+ },+ {+ "number": "22",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "23",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD analog supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "25",+ "name": "RBIAS",+ "type": "passive",+ "description": "External precision bias resistor connection for reference current."+ },+ {+ "number": "26",+ "name": "VDD",+ "type": "power_in",+ "description": "AVDD_GUARD supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "27",+ "name": "VSS",+ "type": "power_in",+ "description": "Optional IOVSS ground pin."+ },+ {+ "number": "28",+ "name": "P1_2",+ "type": "bidirectional",+ "description": "General-purpose I/O port 1 bit 2, also the debug clock."+ },+ {+ "number": "29",+ "name": "P1_3",+ "type": "bidirectional",+ "description": "General-purpose I/O port 1 bit 3, also the debug data."+ },+ {+ "number": "30",+ "name": "VDD",+ "type": "power_in",+ "description": "IOVDD digital I/O supply pin, 2 V to 3.6 V, must be at the same voltage as all other VDD pins."+ },+ {+ "number": "31",+ "name": "DCPL1",+ "type": "passive",+ "description": "1.8-V regulator decoupling pin."+ },+ {+ "number": "32",+ "name": "VSS",+ "type": "power_in",+ "description": "USB ground pin."+ },+ {+ "number": "33",+ "name": "VSS",+ "type": "power_in",+ "description": "Exposed thermal pad, must be connected to a solid ground plane as the main ground connection for the chip."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 17 (XOSC1) description states 'or external-clock input' indicating dual-mode capability: passive; Exposed thermal ground pad listed in PIN DESCRIPTIONS table without numeric pin number; designated a",+ "exposed pad 33 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.1425,+ "at": "2026-10-03T05:30:03"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cc2544",+ "pages": 31,+ "sha256": "553344b3091742a9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}