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CC2541F256RHAT

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Texas Instruments RF Transceiver ICs, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs cc2541f256rhat: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cc2541f256rhat: viewers · Ray
cc2541f256rhat-etched.fit.json cc2541f256rhat: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc2541f256rhat-etched.glb cc2541f256rhat: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc2541f256rhat-etched.step cc2541f256rhat: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc2541f256rhat.glb Publish 0.1.0 · Ray
cc2541f256rhat.kicad_mod Publish 0.1.0 · Ray
cc2541f256rhat.kicad_sym Publish 0.1.0 · Ray
cc2541f256rhat.lbr Publish 0.1.0 · Ray
cc2541f256rhat.step Publish 0.1.0 · Ray
package.json cc2541f256rhat: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cc2541f256rhat: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cc2541f256rhat · Ray

CC2541F256RHAT

Texas Instruments · RF Transceiver ICs · VQFN-40-EP(6x6)

CC2541F256RHAT from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground connection; connect to GND
2 SCL bidirectional I2C clock or general-purpose digital I/O pin; can be used as I2C clock or digital I/O, leave floating if not used, disable pull-up if grounded
3 SDA bidirectional I2C data or general-purpose digital I/O pin; can be used as I2C data or digital I/O, leave floating if not used, disable pull-up if grounded
4 NC unconnected Not connected; do not use
5 P1_5 bidirectional General-purpose digital I/O port 1.5
6 P1_4 bidirectional General-purpose digital I/O port 1.4
7 P1_3 bidirectional General-purpose digital I/O port 1.3
8 P1_2 bidirectional General-purpose digital I/O port 1.2
9 P1_1 bidirectional General-purpose digital I/O port 1.1 with 20-mA drive capability
10 DVDD2 power_in Digital power supply voltage in range 2 V to 3.6 V
11 P1_0 bidirectional General-purpose digital I/O port 1.0 with 20-mA drive capability
12 P0_7 bidirectional General-purpose digital I/O port 0.7
13 P0_6 bidirectional General-purpose digital I/O port 0.6
14 P0_5 bidirectional General-purpose digital I/O port 0.5
15 P0_4 bidirectional General-purpose digital I/O port 0.4
16 P0_3 bidirectional General-purpose digital I/O port 0.3
17 P0_2 bidirectional General-purpose digital I/O port 0.2
18 P0_1 bidirectional General-purpose digital I/O port 0.1
19 P0_0 bidirectional General-purpose digital I/O port 0.0
20 RESET_N input Active-low asynchronous reset input
21 AVDD5 power_in Analog power supply voltage in range 2 V to 3.6 V
22 XOSC_Q1 bidirectional 32-MHz crystal oscillator input/output pin 1 or external clock input
23 XOSC_Q2 bidirectional 32-MHz crystal oscillator input/output pin 2
24 AVDD3 power_in Analog power supply voltage in range 2 V to 3.6 V
25 RF_P bidirectional Positive RF signal path for low-noise amplifier receive input or power amplifier transmit output
26 RF_N bidirectional Negative RF signal path for low-noise amplifier receive input or power amplifier transmit output
27 AVDD2 power_in Analog power supply voltage in range 2 V to 3.6 V
28 AVDD1 power_in Analog power supply voltage in range 2 V to 3.6 V
29 AVDD4 power_in Analog power supply voltage in range 2 V to 3.6 V
30 RBIAS bidirectional External precision bias resistor connection for internal reference current generation
31 AVDD6 power_in Analog power supply voltage in range 2 V to 3.6 V
32 P2_4/OSC32K_Q1 bidirectional Port 2.4 general-purpose digital I/O or 32.768-kHz crystal oscillator input/output pin
33 P2_3/OSC32K_Q2 bidirectional Port 2.3 general-purpose digital I/O or 32.768-kHz crystal oscillator input/output pin
34 P2_2/DC bidirectional Port 2.2 general-purpose digital I/O or debug clock pin
35 P2_1/DD bidirectional Port 2.1 general-purpose digital I/O or debug data pin
36 P2_0 bidirectional General-purpose digital I/O port 2.0
37 P1_7 bidirectional General-purpose digital I/O port 1.7
38 P1_6 bidirectional General-purpose digital I/O port 1.6
39 DVDD1 power_in Digital power supply voltage in range 2 V to 3.6 V
40 DCOUPL power_in 1.8-V internal digital voltage regulator decoupling capacitor connection; do not use for external circuit supply
41 GND power_in Exposed thermal pad ground connection; must be soldered to solid ground plane for thermal and mechanical performance

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40-EP(6x6)
Category RF And Wireless
Pins 41

CAD (KiCad official)

  • Symbol: CC2541F256RHAT
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: cc2541f256rhat-etched.step / cc2541f256rhat-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc2541f256rhat.step / cc2541f256rhat.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 6a99abaeb2964fdb, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF