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Ray Initial commit: component/cc2541f256rhar 1df118c

CC2541F256RHAR

Texas Instruments · RF Transceiver ICs · WQFN-40-EP(6x6)

CC2541F256RHAR from Texas Instruments, in a WQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground connection for digital circuit; must be connected to PCB ground plane and solid ground pour.
2 SCL bidirectional I2C serial clock input or general-purpose I/O pin; leave floating if not used, disable internal pull-up if grounded.
3 SDA bidirectional I2C serial data input/output or general-purpose I/O pin; leave floating if not used, disable internal pull-up if grounded.
4 NC unconnected Not connected; reserved pin that must not be connected to external circuitry.
5 P1_5 bidirectional General-purpose I/O port 1.5 pin; configurable as input or output with programmable pull-up/pull-down resistor.
6 P1_4 bidirectional General-purpose I/O port 1.4 pin; configurable as input or output with programmable pull-up/pull-down resistor.
7 P1_3 bidirectional General-purpose I/O port 1.3 pin; configurable as input or output with programmable pull-up/pull-down resistor.
8 P1_2 bidirectional General-purpose I/O port 1.2 pin; configurable as input or output with programmable pull-up/pull-down resistor.
9 P1_1 bidirectional General-purpose I/O port 1.1 pin with 20-mA drive capability for LED control or high-current output.
10 DVDD2 power_in 2-V to 3.6-V digital power supply input pin; requires 100-nF decoupling capacitor to ground.
11 P1_0 bidirectional General-purpose I/O port 1.0 pin with 20-mA drive capability for LED control or high-current output.
12 P0_7 bidirectional General-purpose I/O port 0.7 pin; configurable as input or output with programmable pull-up/pull-down resistor.
13 P0_6 bidirectional General-purpose I/O port 0.6 pin; configurable as input or output with programmable pull-up/pull-down resistor.
14 P0_5 bidirectional General-purpose I/O port 0.5 pin; configurable as input or output with programmable pull-up/pull-down resistor.
15 P0_4 bidirectional General-purpose I/O port 0.4 pin; configurable as input or output with programmable pull-up/pull-down resistor.
16 P0_3 bidirectional General-purpose I/O port 0.3 pin; configurable as input or output with programmable pull-up/pull-down resistor.
17 P0_2 bidirectional General-purpose I/O port 0.2 pin; configurable as input or output with programmable pull-up/pull-down resistor.
18 P0_1 bidirectional General-purpose I/O port 0.1 pin; configurable as input or output with programmable pull-up/pull-down resistor.
19 P0_0 bidirectional General-purpose I/O port 0.0 pin; configurable as input or output with programmable pull-up/pull-down resistor.
20 RESET_N input Active-low asynchronous reset input; minimum pulse width 1 µs; must stay high during normal operation.
21 AVDD5 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
22 XOSC_Q1 bidirectional 32-MHz crystal oscillator pin 1 or external clock input; connect to primary oscillator node or external clock source.
23 XOSC_Q2 bidirectional 32-MHz crystal oscillator pin 2; connect to secondary oscillator node of 32-MHz crystal.
24 AVDD3 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
25 RF_P bidirectional Positive differential RF signal input to low-noise amplifier during RX; positive output from power amplifier during TX.
26 RF_N bidirectional Negative differential RF signal input to low-noise amplifier during RX; negative output from power amplifier during TX.
27 AVDD2 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
28 AVDD1 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
29 AVDD4 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
30 RBIAS input Analog input for external precision bias resistor (56 kΩ ±1% recommended); sets internal reference current for on-chip biasing network.
31 AVDD6 power_in 2-V to 3.6-V analog power supply input pin; requires 100-nF decoupling capacitor to ground.
32 P2_4/OSC32K_Q1 bidirectional General-purpose I/O port 2.4 or 32.768-kHz crystal oscillator input pin 1; function selected by firmware configuration.
33 P2_3/OSC32K_Q2 bidirectional General-purpose I/O port 2.3 or 32.768-kHz crystal oscillator input pin 2; function selected by firmware configuration.
34 P2_2 bidirectional General-purpose I/O port 2.2 or debug clock input; dual function for in-circuit debugging.
35 P2_1 bidirectional General-purpose I/O port 2.1 or debug data input/output; dual function for in-circuit debugging.
36 P2_0 bidirectional General-purpose I/O port 2.0 pin; configurable as input or output with programmable pull-up/pull-down resistor.
37 P1_7 bidirectional General-purpose I/O port 1.7 pin; configurable as input or output with programmable pull-up/pull-down resistor.
38 P1_6 bidirectional General-purpose I/O port 1.6 pin; configurable as input or output with programmable pull-up/pull-down resistor.
39 DVDD1 power_in 2-V to 3.6-V digital power supply input pin; requires 100-nF decoupling capacitor to ground.
40 DCOUPL power_out 1.8-V output from on-chip digital voltage regulator; requires 1-µF decoupling capacitor; do not use to supply external circuits.
41 GND (Exposed Pad) power_in Thermal and mechanical ground connection from exposed die attach pad; must be soldered to solid PCB ground plane for proper heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-40-EP(6x6)
Category RF And Wireless
Pins 41

CAD (KiCad official)

  • Symbol: CC2541F256RHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: WQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: cc2541f256rhar-etched.step / cc2541f256rhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc2541f256rhar.step / cc2541f256rhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 6a99abaeb2964fdb, retrieved 2026-09-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF