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CC2538SF53RTQR

Public Made by Adom

by adom

Texas Instruments RF Transceiver ICs, TQFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CC2538SF53RTQR

Texas Instruments · RF Transceiver ICs · TQFN-56-EP(8x8)

CC2538SF53RTQR from Texas Instruments, in a TQFN-56-EP(8x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DGND_USB power_in USB ground connection for differential pads.
2 USB_P bidirectional USB differential data plus (D+) signal terminal.
3 USB_N bidirectional USB differential data minus (D-) signal terminal.
4 DVDD_USB power_in 3.3-V USB power-supply connection for USB pads.
5 PB0 bidirectional GPIO port B pin 0 configurable as digital input or output.
6 PC7 bidirectional GPIO port C pin 7 configurable as digital input or output.
7 PC6 bidirectional GPIO port C pin 6 configurable as digital input or output.
8 PC5 bidirectional GPIO port C pin 5 configurable as digital input or output.
9 PC4 bidirectional GPIO port C pin 4 configurable as digital input or output.
10 DVDD power_in 2-V-3.6-V digital power-supply connection.
11 PC3 bidirectional GPIO port C pin 3 with 20 mA output capability, no internal pull-up or pull-down.
12 PC2 bidirectional GPIO port C pin 2 with 20 mA output capability, no internal pull-up or pull-down.
13 PC1 bidirectional GPIO port C pin 1 with 20 mA output capability, no internal pull-up or pull-down.
14 PC0 bidirectional GPIO port C pin 0 with 20 mA output capability, no internal pull-up or pull-down.
15 DVDD power_in 2-V-3.6-V digital power-supply connection.
16 PA0 bidirectional GPIO port A pin 0; alternate function is ROM bootloader UART RXD.
17 PA1 bidirectional GPIO port A pin 1; alternate function is ROM bootloader UART TXD.
18 PA2 bidirectional GPIO port A pin 2; alternate function is ROM bootloader SSI CLK.
19 PA3 bidirectional GPIO port A pin 3; alternate function is ROM bootloader SSI SEL.
20 PA4 bidirectional GPIO port A pin 4; alternate function is ROM bootloader SSI RXD.
21 PA5 bidirectional GPIO port A pin 5; alternate function is ROM bootloader SSI TXD.
22 PA6 bidirectional GPIO port A pin 6 configurable as digital input or output.
23 PA7 bidirectional GPIO port A pin 7 configurable as digital input or output.
24 DVDD power_in 2-V-3.6-V digital power-supply connection.
25 PD0 bidirectional GPIO port D pin 0 configurable as digital input or output.
26 PD1 bidirectional GPIO port D pin 1 configurable as digital input or output.
27 PD2 bidirectional GPIO port D pin 2 configurable as digital input or output.
28 RESET_N input Reset input, active-low assertion required to reset the device.
29 PD3 bidirectional GPIO port D pin 3 configurable as digital input or output.
30 PD4 bidirectional GPIO port D pin 4 configurable as digital input or output.
31 PD5 bidirectional GPIO port D pin 5 configurable as digital input or output.
32 DCOUPL2 passive 1.8-V regulated digital-supply decoupling capacitor connection; should be shorted to pin 56.
33 AVDD power_in 2-V-3.6-V analog power-supply connection.
34 XOSC32M_Q1 passive 32-MHz crystal oscillator pin 1 or external-clock input.
35 XOSC32M_Q2 passive 32-MHz crystal oscillator pin 2.
36 AVDD power_in 2-V-3.6-V analog power-supply connection.
37 RF_P bidirectional Positive RF input signal to LNA during RX; positive RF output signal from PA during TX.
38 RF_N bidirectional Negative RF input signal to LNA during RX; negative RF output signal from PA during TX.
39 AVDD power_in 2-V-3.6-V analog power-supply connection.
40 AVDD power_in 2-V-3.6-V analog power-supply connection.
41 AVDD power_in 2-V-3.6-V analog power-supply connection.
42 R_BIAS passive External precision bias resistor connection for on-chip reference current generation.
43 AVDD_GUARD power_in 2-V-3.6-V analog power-supply connection with guard function.
44 PD6/XOSC32K_Q1 bidirectional GPIO port D pin 6 or 32-kHz crystal oscillator pin 1 (multi-function).
45 PD7/XOSC32K_Q2 bidirectional GPIO port D pin 7 or 32-kHz crystal oscillator pin 2 (multi-function).
46 JTAG_TMS bidirectional JTAG test mode select signal for debug interface.
47 JTAG_TCK bidirectional JTAG test clock signal for debug interface.
48 PB7 bidirectional GPIO port B pin 7; alternate function is JTAG TDO (test data output).
49 PB6 bidirectional GPIO port B pin 6; alternate function is JTAG TDI (test data input).
50 PB5 bidirectional GPIO port B pin 5 configurable as digital input or output.
51 PB4 bidirectional GPIO port B pin 4 configurable as digital input or output.
52 PB3 bidirectional GPIO port B pin 3 configurable as digital input or output.
53 PB2 bidirectional GPIO port B pin 2 configurable as digital input or output.
54 PB1 bidirectional GPIO port B pin 1 configurable as digital input or output.
55 DVDD power_in 2-V-3.6-V digital power-supply connection.
56 DCOUPL1 passive 1.8-V regulated digital-supply decoupling capacitor connection.
57 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFN-56-EP(8x8)
Category RF And Wireless
Pins 57

CAD (KiCad official)

  • Symbol: CC2538SF53RTQR
  • Footprint: Package_DFN_QFN:QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm
  • 3D model: TQFN-56-EP(8x8) (KiCad packages3D, STEP)
  • 3D model files: cc2538sf53rtqr-etched.step / cc2538sf53rtqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc2538sf53rtqr.step / cc2538sf53rtqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 5e1df6df95278fed, retrieved 2026-10-03, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF