# CC2533F96RHAR

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-40-EP(6x6)

CC2533F96RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect, unused pin. |
| 2 | SCL | bidirectional | I2C clock pin or digital I/O; leave floating if not used. |
| 3 | SDA | bidirectional | I2C data pin or digital I/O; leave floating if not used. |
| 4 | NC | unconnected | No connect, unused pin. |
| 5 | P1_5 | bidirectional | Digital I/O Port 1.5. |
| 6 | P1_4 | bidirectional | Digital I/O Port 1.4. |
| 7 | P1_3 | bidirectional | Digital I/O Port 1.3. |
| 8 | P1_2 | bidirectional | Digital I/O Port 1.2. |
| 9 | P1_1 | bidirectional | Digital I/O Port 1.1 with 20-mA drive capability. |
| 10 | DVDD2 | power_in | 2-V to 3.6-V digital power-supply connection. |
| 11 | P1_0 | bidirectional | Digital I/O Port 1.0 with 20-mA drive capability. |
| 12 | P0_7 | bidirectional | Digital I/O Port 0.7. |
| 13 | P0_6 | bidirectional | Digital I/O Port 0.6. |
| 14 | P0_5 | bidirectional | Digital I/O Port 0.5. |
| 15 | P0_4 | bidirectional | Digital I/O Port 0.4. |
| 16 | P0_3 | bidirectional | Digital I/O Port 0.3. |
| 17 | P0_2 | bidirectional | Digital I/O Port 0.2. |
| 18 | P0_1 | bidirectional | Digital I/O Port 0.1. |
| 19 | P0_0 | bidirectional | Digital I/O Port 0.0. |
| 20 | RESET_N | input | Active-low digital reset input. |
| 21 | AVDD5 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 22 | XOSC_Q1 | bidirectional | 32-MHz crystal oscillator pin 1 or external clock input. |
| 23 | XOSC_Q2 | bidirectional | 32-MHz crystal oscillator pin 2. |
| 24 | AVDD3 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 25 | RF_P | bidirectional | Positive RF input signal to the LNA during RX and positive RF output signal from the PA during TX. |
| 26 | RF_N | bidirectional | Negative RF input signal to the LNA during RX and negative RF output signal from the PA during TX. |
| 27 | AVDD2 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 28 | AVDD1 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 29 | AVDD4 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 30 | RBIAS | passive | Analog I/O for the external precision bias resistor that sets the reference current. |
| 31 | AVDD6 | power_in | 2-V to 3.6-V analog power-supply connection. |
| 32 | P2_4/XOSC32K_Q1 | bidirectional | Digital I/O Port 2.4 or 32.768-kHz crystal oscillator analog pin Q1. |
| 33 | P2_3/XOSC32K_Q2 | bidirectional | Digital I/O Port 2.3 or 32.768-kHz crystal oscillator analog pin Q2. |
| 34 | P2_2 | bidirectional | Digital I/O Port 2.2. |
| 35 | P2_1 | bidirectional | Digital I/O Port 2.1. |
| 36 | P2_0 | bidirectional | Digital I/O Port 2.0. |
| 37 | P1_7 | bidirectional | Digital I/O Port 1.7. |
| 38 | P1_6 | bidirectional | Digital I/O Port 1.6. |
| 39 | DVDD1 | power_in | 2-V to 3.6-V digital power-supply connection. |
| 40 | DCOUPL | power_out | 1.8-V digital power-supply decoupling pin; do not use for supplying external circuits. |
| 41 | GND | power_in | Exposed ground pad that must be connected to a solid ground plane, as it is the chip ground connection. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Embedded Processors & Controllers |
| Pins | 41 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage |  | -0.3 |  | 3.9 | V | All supply pins must have the same voltage | 4 |
| Voltage on any digital pin |  | -0.3 |  |  | V | VDD + 0.3, V ≤ 3.9 | 4 |
| Input RF level |  |  |  | 10 | dBm |  | 4 |
| Storage temperature range |  | -40 |  | 125 | °C |  | 4 |
| ESD human-body model |  |  |  | 2 | kV | All pads, human-body model, JEDEC STD 22, method A114 | 4 |
| ESD charged-device model |  |  |  | 500 | V | According to charged-device model, JEDEC STD 22, method C101 | 4 |
| ESD machine model |  |  |  | 200 | V | All pads excluding RF pads, machine model, JEDEC STD 22, method A115 | 4 |
| Operating ambient temperature range | TA | -40 |  | 125 | °C |  | 4 |
| Operating supply voltage |  | 2 |  | 3.6 | V |  | 4 |
| Core current consumption | Icore |  | 6.6 | 7.7 | mA | 32-MHz XOSC running. No radio or peripherals active. Medium CPU activity: normal flash access, no RAM access | 4 |
| Core current consumption | Icore |  | 25.1 | 29.8 | mA | 32-MHz XOSC running, radio in RX mode at -100-dBm input power (waiting for signal), no peripherals active, CPU idle | 4 |
| Core current consumption | Icore |  | 32.3 | 40.6 | mA | 32-MHz XOSC running, radio in TX mode, 4.5-dBm output power, no peripherals active, CPU idle | 4 |
| Power mode 1 current | Icore |  | 0.2 | 0.3 | mA | Power mode 1. Digital regulator on; 16-MHz RCOSC and 32-MHz crystal oscillator off; 32.768-kHz XOSC, POR, BOD, and sleep timer active; RAM and register retention | 4 |
| Power mode 2 current | Icore |  | 1 | 1.5 | mA | Power mode 2. Digital regulator off; 16-MHz RCOSC and 32-MHz crystal oscillator off; 32.768-kHz XOSC, POR, and sleep timer active; RAM and register retention | 4 |
| Power mode 3 current | Icore |  | 0.4 | 0.7 | mA | Power mode 3. Digital regulator off; no clocks; POR active; RAM and register retention | 4 |
| Logic-0 input current |  | -50 |  | 50 | nA | Input equals 0 V | 15 |
| Logic-1 input current |  | -50 |  | 50 | nA | Input equals VDD | 15 |
| RF frequency range |  | 2394 |  | 2507 | MHz | Programmable in 1-MHz steps, 5 MHz between channels | 5 |
| Frequency error tolerance |  | -150 |  | 150 | ppm | [1] requires minimum 80 ppm | 6 |
| Symbol rate error tolerance |  | -1000 |  | 1000 | ppm | [1] requires minimum 80 ppm | 6 |
| Crystal frequency accuracy (32 MHz) |  | -40 |  | 40 | ppm | Including aging and temperature dependency, as specified by [1] | 8 |
| Equivalent series resistance (32 MHz crystal) | ESR | 6 |  | 60 | Ω |  | 8 |
| Crystal shunt capacitance (32 MHz crystal) | C0 | 1 |  | 7 | pF |  | 8 |
| Crystal load capacitance (32 MHz crystal) | CL | 10 |  | 16 | pF |  | 8 |
| Crystal frequency accuracy (32.768 kHz) |  | -40 |  | 40 | ppm | Including aging and temperature dependency, as specified by [1] | 8 |
| Equivalent series resistance (32.768 kHz crystal) | ESR | 40 |  | 130 | kΩ |  | 8 |
| Crystal shunt capacitance (32.768 kHz crystal) | C0 | 0.9 |  | 2 | pF |  | 8 |
| Crystal load capacitance (32.768 kHz crystal) | CL | 12 |  | 16 | pF |  | 8 |
| 32-kHz RC oscillator frequency accuracy after calibration |  | -0.2 |  | 0.2 | % |  | 8 |
| 16-MHz RC oscillator uncalibrated frequency accuracy |  | -18 |  | 18 | % |  | 9 |
| Absolute uncalibrated RSSI/CCA accuracy |  | -4 |  | 4 | dB |  | 9 |

## CAD (KiCad official)

- Symbol: `CC2533F96RHAR`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`
- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files: `cc2533f96rhar-etched.step` / `cc2533f96rhar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cc2533f96rhar.step` / `cc2533f96rhar.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cc2533.pdf) (35 pp, sha256 `67f244e4f2dbc3a3`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cc2533f96rhar-datasheet.pdf)