component
CC2530F256RHAR
Public Made by Adomby adom
Texas Instruments RF Transceiver ICs, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCC2530F256RHAR
Texas Instruments · RF Transceiver ICs · QFN-40-EP(6x6)
CC2530F256RHAR from Texas Instruments, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Unused pin; must be connected to GND. |
| 2 | GND | power_in | Unused pin; must be connected to GND. |
| 3 | GND | power_in | Unused pin; must be connected to GND. |
| 4 | GND | power_in | Unused pin; must be connected to GND. |
| 5 | P1_5 | bidirectional | General-purpose digital I/O, Port 1.5; 4-mA drive. |
| 6 | P1_4 | bidirectional | General-purpose digital I/O, Port 1.4; 4-mA drive. |
| 7 | P1_3 | bidirectional | General-purpose digital I/O, Port 1.3; 4-mA drive. |
| 8 | P1_2 | bidirectional | General-purpose digital I/O, Port 1.2; 4-mA drive. |
| 9 | P1_1 | bidirectional | General-purpose digital I/O, Port 1.1; 20-mA drive capability. |
| 10 | DVDD2 | power_in | 2-V-3.6-V digital power-supply connection. |
| 11 | P1_0 | bidirectional | General-purpose digital I/O, Port 1.0; 20-mA drive capability. |
| 12 | P0_7 | bidirectional | General-purpose digital I/O, Port 0.7; also ADC channel 7 input (0 V to VDD_AVDD5 range). |
| 13 | P0_6 | bidirectional | General-purpose digital I/O, Port 0.6; also ADC channel 6 input. |
| 14 | P0_5 | bidirectional | General-purpose digital I/O, Port 0.5; also ADC channel 5 input. |
| 15 | P0_4 | bidirectional | General-purpose digital I/O, Port 0.4; also ADC channel 4 input. |
| 16 | P0_3 | bidirectional | General-purpose digital I/O, Port 0.3; also ADC channel 3 input. |
| 17 | P0_2 | bidirectional | General-purpose digital I/O, Port 0.2; also ADC channel 2 input. |
| 18 | P0_1 | bidirectional | General-purpose digital I/O, Port 0.1; also ADC channel 1 input. |
| 19 | P0_0 | bidirectional | General-purpose digital I/O, Port 0.0; also ADC channel 0 input. |
| 20 | RESET_N | input | Active-low reset input; minimum recognized reset-pulse width is 1 μs. |
| 21 | AVDD5 | power_in | 2-V-3.6-V analog power-supply connection; supplies ADC reference and op-amp. |
| 22 | XOSC_Q1 | passive | 32-MHz crystal oscillator pin 1 or external-clock input; crystal load capacitance 10-16 pF, ESR ≤ 60 Ω. |
| 23 | XOSC_Q2 | passive | 32-MHz crystal oscillator pin 2. |
| 24 | AVDD3 | power_in | 2-V-3.6-V analog power-supply connection. |
| 25 | RF_P | bidirectional | Positive RF I/O: LNA input during RX, PA output during TX; differential optimum load impedance 69 + j29 Ω toward antenna. |
| 26 | RF_N | bidirectional | Negative RF I/O: LNA input during RX, PA output during TX. |
| 27 | AVDD2 | power_in | 2-V-3.6-V analog power-supply connection. |
| 28 | AVDD1 | power_in | 2-V-3.6-V analog power-supply connection. |
| 29 | AVDD4 | power_in | 2-V-3.6-V analog power-supply connection. |
| 30 | RBIAS | passive | External precision bias resistor for internal reference current; requires 56-kΩ resistor to GND. |
| 31 | AVDD6 | power_in | 2-V-3.6-V analog power-supply connection. |
| 32 | P2_4/XOSC32K_Q1 | bidirectional | General-purpose digital/analog I/O, Port 2.4 or 32.768-kHz crystal oscillator pin 1; crystal load capacitance 12-16 pF. |
| 33 | P2_3/XOSC32K_Q2 | bidirectional | General-purpose digital/analog I/O, Port 2.3 or 32.768-kHz crystal oscillator pin 2. |
| 34 | P2_2 | bidirectional | General-purpose digital I/O, Port 2.2; also used as DEBUG_CLK in the two-wire serial debug interface (max 12 MHz). |
| 35 | P2_1 | bidirectional | General-purpose digital I/O, Port 2.1; also used as DEBUG_DATA in the two-wire serial debug interface. |
| 36 | P2_0 | bidirectional | General-purpose digital I/O, Port 2.0; 4-mA drive. |
| 37 | P1_7 | bidirectional | General-purpose digital I/O, Port 1.7; 4-mA drive. |
| 38 | P1_6 | bidirectional | General-purpose digital I/O, Port 1.6; 4-mA drive. |
| 39 | DVDD1 | power_in | 2-V-3.6-V digital power-supply connection. |
| 40 | DCOUPL | power_out | 1.8-V on-chip digital voltage-regulator output decoupling node; do not use for supplying external circuits; requires 1-μF capacitor to GND for stable operation. |
| 41 | GND | power_in | Exposed thermal ground pad; must be soldered to a solid PCB ground plane - this is the primary ground connection for the chip. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-40-EP(6x6) |
| Category | RF And Wireless |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
CC2530F256RHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
cc2530f256rhar-etched.step/cc2530f256rhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cc2530f256rhar.step/cc2530f256rhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
78d47f4ae373c95a, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).