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Name	Last commit message	Last updated
docs	cc2420rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
viewers	cc2420rgzr: viewers · Ray	4d ago
cc2420rgzr-etched.fit.json	cc2420rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc2420rgzr-etched.glb	cc2420rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc2420rgzr-etched.step	cc2420rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
cc2420rgzr.glb	Publish 0.1.0 · Ray	4d ago
cc2420rgzr.kicad_mod	Publish 0.1.0 · Ray	4d ago
cc2420rgzr.kicad_sym	Publish 0.1.0 · Ray	4d ago
cc2420rgzr.lbr	Publish 0.1.0 · Ray	4d ago
cc2420rgzr.step	Publish 0.1.0 · Ray	4d ago
package.json	Publish 0.1.0 · Ray	4d ago
page.json	Set visibility: public · Ray	4d ago
README.md	Initial commit: component/cc2420rgzr · Ray	4d ago

CC2420RGZR

Texas Instruments · RF Transceiver ICs · VQFN-48-EP(7x7)

CC2420RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCO_GUARD	power_in	Guard ring connection for VCO to AVDD shielding.
2	AVDD_VCO	power_in	1.8 V power supply for VCO.
3	AVDD_PRE	power_in	1.8 V power supply for prescaler.
4	AVDD_RF1	power_in	1.8 V power supply for RF front-end.
5	GND	power_in	Analog ground pin for RF shielding.
6	RF_P	bidirectional	Positive RF input/output signal for LNA in receive mode and PA in transmit mode.
7	TXRX_SWITCH	power_in	RF front-end common supply connection requiring external DC connection to RF_P and RF_N.
8	RF_N	bidirectional	Negative RF input/output signal for LNA in receive mode and PA in transmit mode.
9	GND	power_in	Analog ground pin for RF shielding.
10	AVDD_SW	power_in	1.8 V power supply for LNA and PA switch.
11	NC	unconnected	Not connected.
12	NC	unconnected	Not connected.
13	NC	unconnected	Not connected.
14	AVDD_RF2	power_in	1.8 V power supply for receive and transmit mixers.
15	AVDD_IF2	power_in	1.8 V power supply for transmit and receive IF chain.
16	NC	unconnected	Not connected.
17	AVDD_ADC	power_in	1.8 V power supply for analog sections of ADCs and DACs.
18	DVDD_ADC	power_in	1.8 V power supply for digital sections of receive ADCs.
19	DGND_GUARD	power_in	Digital ground connection for digital noise isolation.
20	DGUARD	power_in	1.8 V power supply connection for digital noise isolation.
21	RESETn	input	Asynchronous active-low digital reset.
22	DGND	power_in	Digital ground connection for digital core and pads.
23	DSUB_PADS	power_in	Substrate ground connection for digital pads.
24	DSUB_CORE	power_in	Substrate ground connection for digital modules.
25	DVDD3.3	power_in	3.3 V power supply for digital I/Os with voltage range 1.6 to 3.6 V matching external interfacing circuit.
26	DVDD1.8	power_in	1.8 V power supply for digital core.
27	SFD	output	Start of Frame Delimiter digital output or digital mux output.
28	CCA	output	Clear Channel Assessment digital output or digital mux output.
29	FIFOP	output	Active high when RXFIFO bytes exceed threshold or serial RF clock in test mode.
30	FIFO	bidirectional	Active high when data in RXFIFO or serial RF data input/output in test mode.
31	CSn	input	SPI chip select active low.
32	SCLK	input	SPI serial clock input up to 10 MHz maximum frequency.
33	SI	input	SPI slave input sampled on positive edge of SCLK.
34	SO	tri_state	SPI slave output tristate updated on negative edge of SCLK.
35	DVDD_RAM	power_in	1.8 V power supply for digital RAM.
36	NC	unconnected	Not connected.
37	AVDD_XOSC16	power_in	1.8 V power supply for 16 MHz crystal oscillator.
38	XOSC16_Q2	bidirectional	16 MHz crystal oscillator pin 2.
39	XOSC16_Q1	bidirectional	16 MHz crystal oscillator pin 1 or external clock input.
40	NC	unconnected	Not connected.
41	VREG_EN	input	Voltage regulator enable active high held at VREG_IN voltage level.
42	VREG_OUT	power_out	Voltage regulator 1.8 V power supply output.
43	VREG_IN	power_in	Voltage regulator power supply input with 2.1 to 3.6 V range.
44	AVDD_IF1	power_in	1.8 V power supply for transmit and receive IF chain.
45	R_BIAS	output	External precision resistor connection for 43 kΩ ±1% component.
46	ATEST2	bidirectional	Analog test I/O for prototype and production testing.
47	ATEST1	bidirectional	Analog test I/O for prototype and production testing.
48	AVDD_CHP	power_in	1.8 V power supply for phase detector and charge pump.
49	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-48-EP(7x7)
Category	Radio Frequency Chip/Antenna
Pins	49

CAD (KiCad official)

Symbol: CC2420RGZR
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
3D model files: cc2420rgzr-etched.step / cc2420rgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc2420rgzr.step / cc2420rgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (90 pp, sha256 7816553859cd665f, retrieved 2026-10-01, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF