component
CC2340R52E0RGER
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
cc2340r52e0rger: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
bd1b20b
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{
"slug": "cc2340r52e0rger",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"cc2340r52e0rger",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cc2340r52e0rger.kicad_sym",
"cc2340r52e0rger.kicad_mod",
"cc2340r52e0rger.glb",
"cc2340r52e0rger.step",
"cc2340r52e0rger.lbr",
"docs/hero.png",
"docs/cc2340r52e0rger-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"component": {
"mpn": "CC2340R52E0RGER",
"manufacturer": "Texas Instruments",
"package": "VQFN-24(4x4)",
"pin_count": 25,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com.cn/cn/lit/ds/symlink/cc2340r5.pdf?ts=1739430519641&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fsitesearch%252Fzh-cn%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Dzh-CN%2526nr%253D32%2526searchTerm%253DCC2340R52E0RGER",
"parts": {
"symbol": "cc2340r52e0rger.kicad_sym",
"footprint": "cc2340r52e0rger.kicad_mod",
"model_3d": "cc2340r52e0rger-etched.glb",
"model_3d_plain": "cc2340r52e0rger.glb",
"model_3d_step": "cc2340r52e0rger-etched.step",
"model_3d_step_plain": "cc2340r52e0rger.step",
"lbr": "cc2340r52e0rger.lbr"
},
"distributor_links": {
"lcsc": "C20416850"
},
"pins": [
{
"number": "1",
"name": "ANT",
"type": "passive",
"description": "50Ω single-ended RF port for 2.4GHz antenna connection through integrated balun"
},
{
"number": "2",
"name": "VDDR",
"type": "power_in",
"description": "Internal 1.28V regulated supply for radio frequency and CPU subsystems; requires 10µF bypass capacitor on all instances"
},
{
"number": "3",
"name": "DIO8",
"type": "bidirectional",
"description": "General-purpose I/O with mux options: SPI0SCLK, UART0RTS, timer compare/PWM, I2C0SDA, or digital test bus"
},
{
"number": "4",
"name": "DIO11",
"type": "bidirectional",
"description": "General-purpose I/O with mux options: SPI0CSN, timer PWM, I2C0SDA, LRFD output, or digital test bus; supports pull-up/down"
},
{
"number": "5",
"name": "DIO12",
"type": "bidirectional",
"description": "High-drive (max 10mA) general-purpose I/O for GPIO12; supports SPI0POCI/PICO, UART0RXD, I2C0SDA, timer, or DTB functions"
},
{
"number": "6",
"name": "DIO13",
"type": "bidirectional",
"description": "General-purpose I/O with mux options: SPI0POCI/PICO, UART0TXD, timer compare/PWM, or digital test bus output"
},
{
"number": "7",
"name": "DIO16_SWDIO",
"type": "bidirectional",
"description": "High-drive GPIO16 and serial wire debug data I/O (mux=5); supports SPI0PICO, UART0RXD, I2C0SDA, and timer functions"
},
{
"number": "8",
"name": "DIO17_SWDCK",
"type": "bidirectional",
"description": "High-drive GPIO17 and serial wire debug clock (mux=5); supports SPI0SCLK, UART0TXD, I2C0SCL, timer, and DTB functions"
},
{
"number": "9",
"name": "DIO20_A11",
"type": "bidirectional",
"description": "General-purpose I/O and ADC channel 11 input; supports low-power comparator positive input, UART, SPI, timer, and DTB functions"
},
{
"number": "10",
"name": "DIO21_A10",
"type": "bidirectional",
"description": "General-purpose I/O and ADC channel 10 input; supports UART0CTS, timer, I2C, SPI0POCI, LRFD output, and DTB functions"
},
{
"number": "11",
"name": "VDDS",
"type": "power_in",
"description": "Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance"
},
{
"number": "12",
"name": "DIO24_A7",
"type": "bidirectional",
"description": "High-drive general-purpose I/O, low-power comparator positive input, and ADC channel 7 input; supports SPI0SCLK, timer, I2C0SCL, and DTB functions"
},
{
"number": "13",
"name": "RSTN",
"type": "input",
"description": "Global master device reset input (active low); requires minimum 1µs low pulse for hardware reset and wakes device from shutdown mode"
},
{
"number": "14",
"name": "DIO3_X32P",
"type": "bidirectional",
"description": "General-purpose I/O and 32kHz crystal oscillator pin 1 (LFXT_P) with internal load capacitor configurable via software"
},
{
"number": "15",
"name": "DIO4_X32N",
"type": "bidirectional",
"description": "General-purpose I/O and 32kHz crystal oscillator pin 2 (LFXT_N) with internal load capacitor configurable via software"
},
{
"number": "16",
"name": "VDDD",
"type": "power_in",
"description": "1.28V internal regulator output decoupling; requires 10µF ceramic capacitor for filtering and stability; do not use to power external circuits"
},
{
"number": "17",
"name": "DCDC",
"type": "power_out",
"description": "DC/DC converter switch node output; must connect to 10µH inductor and 10µF capacitor to VDDR; leave floating if DCDC disabled"
},
{
"number": "18",
"name": "VDDS",
"type": "power_in",
"description": "Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance"
},
{
"number": "19",
"name": "DIO6_A1",
"type": "bidirectional",
"description": "General-purpose I/O, ADC channel 1/reference positive input, with mux options: SPI0CSN, I2C0SCL, timer, LRFD, UART0TXD, or DTB"
},
{
"number": "20",
"name": "VDDR",
"type": "power_in",
"description": "Internal 1.28V regulated supply for radio frequency and CPU subsystems; requires 10µF bypass capacitor on all instances"
},
{
"number": "21",
"name": "X48P",
"type": "bidirectional",
"description": "48MHz crystal oscillator pin 1; requires external 48MHz crystal with 5-9pF load capacitance for RF transceiver operation"
},
{
"number": "22",
"name": "X48N",
"type": "bidirectional",
"description": "48MHz crystal oscillator pin 2; requires external 48MHz crystal with 5-9pF load capacitance for RF transceiver operation"
},
{
"number": "23",
"name": "GND",
"type": "power_in",
"description": "Ground reference for all analog and digital circuits; multiple pins provide low-impedance return current paths"
},
{
"number": "24",
"name": "VDDS",
"type": "power_in",
"description": "Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance"
},
{
"number": "25",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin 23 (GND) could not be explicitly verified in Table 6-1 RGE column; assumed based on standard QFN",
"exposed pad 25 added from the footprint"
],
"pages_sent": 75,
"cost_usd": 1.0792,
"at": "2026-09-22T22:35:03"
},
"datasheet": {
"url": "https://www.ti.com.cn/cn/lit/ds/symlink/cc2340r5.pdf?ts=1739430519641&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fsitesearch%252Fzh-cn%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Dzh-CN%2526nr%253D32%2526searchTerm%253DCC2340R52E0RGER",
"pages": 75,
"sha256": "314ab0c0140ef9d8",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cc2340r52e0rger.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cc2340r52e0rger-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c90db80906e6eb1985d8f8fc35f6f470d1636b451ff42b0f86164c2e0be0a691",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}