# CC2340R52E0RGER

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-24(4x4)

CC2340R52E0RGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ANT | passive | 50Ω single-ended RF port for 2.4GHz antenna connection through integrated balun |
| 2 | VDDR | power_in | Internal 1.28V regulated supply for radio frequency and CPU subsystems; requires 10µF bypass capacitor on all instances |
| 3 | DIO8 | bidirectional | General-purpose I/O with mux options: SPI0SCLK, UART0RTS, timer compare/PWM, I2C0SDA, or digital test bus |
| 4 | DIO11 | bidirectional | General-purpose I/O with mux options: SPI0CSN, timer PWM, I2C0SDA, LRFD output, or digital test bus; supports pull-up/down |
| 5 | DIO12 | bidirectional | High-drive (max 10mA) general-purpose I/O for GPIO12; supports SPI0POCI/PICO, UART0RXD, I2C0SDA, timer, or DTB functions |
| 6 | DIO13 | bidirectional | General-purpose I/O with mux options: SPI0POCI/PICO, UART0TXD, timer compare/PWM, or digital test bus output |
| 7 | DIO16_SWDIO | bidirectional | High-drive GPIO16 and serial wire debug data I/O (mux=5); supports SPI0PICO, UART0RXD, I2C0SDA, and timer functions |
| 8 | DIO17_SWDCK | bidirectional | High-drive GPIO17 and serial wire debug clock (mux=5); supports SPI0SCLK, UART0TXD, I2C0SCL, timer, and DTB functions |
| 9 | DIO20_A11 | bidirectional | General-purpose I/O and ADC channel 11 input; supports low-power comparator positive input, UART, SPI, timer, and DTB functions |
| 10 | DIO21_A10 | bidirectional | General-purpose I/O and ADC channel 10 input; supports UART0CTS, timer, I2C, SPI0POCI, LRFD output, and DTB functions |
| 11 | VDDS | power_in | Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance |
| 12 | DIO24_A7 | bidirectional | High-drive general-purpose I/O, low-power comparator positive input, and ADC channel 7 input; supports SPI0SCLK, timer, I2C0SCL, and DTB functions |
| 13 | RSTN | input | Global master device reset input (active low); requires minimum 1µs low pulse for hardware reset and wakes device from shutdown mode |
| 14 | DIO3_X32P | bidirectional | General-purpose I/O and 32kHz crystal oscillator pin 1 (LFXT_P) with internal load capacitor configurable via software |
| 15 | DIO4_X32N | bidirectional | General-purpose I/O and 32kHz crystal oscillator pin 2 (LFXT_N) with internal load capacitor configurable via software |
| 16 | VDDD | power_in | 1.28V internal regulator output decoupling; requires 10µF ceramic capacitor for filtering and stability; do not use to power external circuits |
| 17 | DCDC | power_out | DC/DC converter switch node output; must connect to 10µH inductor and 10µF capacitor to VDDR; leave floating if DCDC disabled |
| 18 | VDDS | power_in | Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance |
| 19 | DIO6_A1 | bidirectional | General-purpose I/O, ADC channel 1/reference positive input, with mux options: SPI0CSN, I2C0SCL, timer, LRFD, UART0TXD, or DTB |
| 20 | VDDR | power_in | Internal 1.28V regulated supply for radio frequency and CPU subsystems; requires 10µF bypass capacitor on all instances |
| 21 | X48P | bidirectional | 48MHz crystal oscillator pin 1; requires external 48MHz crystal with 5-9pF load capacitance for RF transceiver operation |
| 22 | X48N | bidirectional | 48MHz crystal oscillator pin 2; requires external 48MHz crystal with 5-9pF load capacitance for RF transceiver operation |
| 23 | GND | power_in | Ground reference for all analog and digital circuits; multiple pins provide low-impedance return current paths |
| 24 | VDDS | power_in | Primary 1.71V to 3.8V system power supply; multiple pins required for adequate current distribution and low impedance |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 25 |

## CAD (KiCad official)

- Symbol: `CC2340R52E0RGER`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files: `cc2340r52e0rger-etched.step` / `cc2340r52e0rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cc2340r52e0rger.step` / `cc2340r52e0rger.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com.cn/cn/lit/ds/symlink/cc2340r5.pdf?ts=1739430519641&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fsitesearch%252Fzh-cn%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Dzh-CN%2526nr%253D32%2526searchTerm%253DCC2340R52E0RGER) (75 pp, sha256 `314ab0c0140ef9d8`, retrieved 2026-09-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cc2340r52e0rger-datasheet.pdf)