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docs cc1310f128rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cc1310f128rgzr: viewers · Ray
cc1310f128rgzr-etched.fit.json cc1310f128rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc1310f128rgzr-etched.glb cc1310f128rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc1310f128rgzr-etched.step cc1310f128rgzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cc1310f128rgzr.glb Publish 0.1.0 · Ray
cc1310f128rgzr.kicad_mod Publish 0.1.0 · Ray
cc1310f128rgzr.kicad_sym Publish 0.1.0 · Ray
cc1310f128rgzr.lbr Publish 0.1.0 · Ray
cc1310f128rgzr.step Publish 0.1.0 · Ray
package.json cc1310f128rgzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cc1310f128rgzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cc1310f128rgzr · Ray

CC1310F128RGZR

Texas Instruments · RF Transceiver ICs · VQFN-48-EP(7x7)

CC1310F128RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RF_P bidirectional Positive RF input signal to LNA during RX; positive RF output signal from PA during TX
2 RF_N bidirectional Negative RF input signal to LNA during RX; negative RF output signal from PA during TX
3 RX_TX bidirectional Optional bias pin for the RF LNA
4 X32K_Q1 passive 32-kHz crystal oscillator pin 1
5 X32K_Q2 passive 32-kHz crystal oscillator pin 2
6 DIO_1 bidirectional GPIO configured for Sensor Controller use
7 DIO_2 bidirectional GPIO configured for Sensor Controller use
8 DIO_3 bidirectional GPIO configured for Sensor Controller use
9 DIO_4 bidirectional GPIO configured for Sensor Controller use
10 DIO_5 bidirectional GPIO with high-drive capability configured for Sensor Controller use
11 DIO_6 bidirectional GPIO with high-drive capability configured for Sensor Controller use
12 DIO_7 bidirectional GPIO with high-drive capability configured for Sensor Controller use
13 VDDS2 power_in 1.8-V to 3.8-V DIO supply for specific GPIO pins
14 DIO_8 bidirectional General-purpose GPIO
15 DIO_9 bidirectional General-purpose GPIO
16 DIO_10 bidirectional General-purpose GPIO
17 DIO_11 bidirectional General-purpose GPIO
18 DIO_12 bidirectional General-purpose GPIO
19 DIO_13 bidirectional General-purpose GPIO
20 DIO_14 bidirectional General-purpose GPIO
21 DIO_15 bidirectional General-purpose GPIO
22 VDDS3 power_in 1.8-V to 3.8-V DIO supply for specific GPIO pins
23 DCOUPL passive 1.27-V regulated digital-supply decoupling capacitor connection
24 JTAG_TMSC bidirectional JTAG test mode select pin with high-drive capability
25 JTAG_TCKC bidirectional JTAG test clock pin
26 DIO_16 bidirectional GPIO with high-drive capability; functions as JTAG_TDO
27 DIO_17 bidirectional GPIO with high-drive capability; functions as JTAG_TDI
28 DIO_18 bidirectional General-purpose GPIO
29 DIO_19 bidirectional General-purpose GPIO
30 DIO_20 bidirectional General-purpose GPIO
31 DIO_21 bidirectional General-purpose GPIO
32 DIO_22 bidirectional General-purpose GPIO
33 DCDC_SW power_out Output from internal DC/DC converter
34 VDDS_DCDC power_in 1.8-V to 3.8-V DC/DC converter supply input
35 RESET_N input Reset signal input, active-low, with no internal pullup
36 DIO_23 bidirectional Analog-capable GPIO configured for Sensor Controller use
37 DIO_24 bidirectional Analog-capable GPIO configured for Sensor Controller use
38 DIO_25 bidirectional Analog-capable GPIO configured for Sensor Controller use
39 DIO_26 bidirectional Analog-capable GPIO configured for Sensor Controller use
40 DIO_27 bidirectional Analog-capable GPIO configured for Sensor Controller use
41 DIO_28 bidirectional Analog-capable GPIO configured for Sensor Controller use
42 DIO_29 bidirectional Analog-capable GPIO configured for Sensor Controller use
43 DIO_30 bidirectional Analog-capable GPIO configured for Sensor Controller use
44 VDDS power_in 1.8-V to 3.8-V main chip supply for core logic
45 VDDR power_in 1.7-V to 1.95-V supply; connect to internal DC/DC output
46 X24M_N passive 24-MHz crystal oscillator input pin 1
47 X24M_P passive 24-MHz crystal oscillator input pin 2
48 VDDR_RF power_in 1.7-V to 1.95-V RF core supply; connect to internal DC/DC output
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category RF And Wireless
Pins 49

CAD (KiCad official)

  • Symbol: CC1310F128RGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: cc1310f128rgzr-etched.step / cc1310f128rgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc1310f128rgzr.step / cc1310f128rgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (72 pp, sha256 6432a4d87e9877c9, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF