main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers cc113lrgpr: viewers · Ray 2d ago
cc113lrgpr-etched.glb cc113lrgpr: factory component page (tier=lcsc) · Ray 2d ago
cc113lrgpr-etched.step cc113lrgpr: factory component page (tier=lcsc) · Ray 2d ago
cc113lrgpr-hero.glb Publish 0.1.0 · Ray 2d ago
cc113lrgpr-hero.overlay.json Publish 0.1.0 · Ray 2d ago
cc113lrgpr.glb Publish 0.1.0 · Ray 2d ago
cc113lrgpr.kicad_mod Publish 0.1.0 · Ray 2d ago
cc113lrgpr.kicad_sym Publish 0.1.0 · Ray 2d ago
cc113lrgpr.lbr Publish 0.1.0 · Ray 2d ago
cc113lrgpr.step Publish 0.1.0 · Ray 2d ago
package.json cc113lrgpr: LCSC part number C374064 (was published as the bare integer) · Ray 1d ago
page.json cc113lrgpr: LCSC part number C374064 (was published as the bare integer) · Ray 1d ago
README.md Initial commit: component/cc113lrgpr · Ray 2d ago

CC113LRGPR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · QFN-20-EP(4x4)

CC113LRGPR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial configuration interface clock input.
2 SO (GDO1) tri_state SPI data output or optional general-purpose output pin when CSn is high.
3 GDO2 output Configurable digital output pin for test signals, FIFO status signals, clock output, or serial output RX data.
4 DVDD power_in Digital power supply (1.8-3.6V) for digital I/O and digital core voltage regulator.
5 DCOUPL power_out Digital decoupling output (1.6-2.0V) for CC113L use only.
6 GDO0 output Configurable digital output pin for test signals, FIFO status signals, clock output, or serial output RX data.
7 CSn input SPI chip select input (active low).
8 XOSC_Q1 bidirectional Crystal oscillator pin 1 or external clock input.
9 AVDD power_in Analog power supply (1.8-3.6V).
10 XOSC_Q2 bidirectional Crystal oscillator pin 2.
11 AVDD power_in Analog power supply (1.8-3.6V).
12 RF_P input Positive RF input signal to low-noise amplifier in receive mode.
13 RF_N input Negative RF input signal to low-noise amplifier in receive mode.
14 AVDD power_in Analog power supply (1.8-3.6V).
15 AVDD power_in Analog power supply (1.8-3.6V).
16 GND power_in Analog ground connection.
17 RBIAS bidirectional External bias resistor connection for reference current.
18 DGUARD power_in Digital isolation power supply for noise isolation.
19 GND power_in Digital ground connection for noise isolation.
20 SI input SPI serial data input for configuration interface.
21 GND power_in Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(4x4)
Category Logic
Pins 21

CAD (KiCad official)

  • Symbol: CC113LRGPR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: cc113lrgpr-etched.step / cc113lrgpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc113lrgpr.step / cc113lrgpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (77 pp, sha256 e9997b4111b11ec7, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF