Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

CC110LRGPR

Texas Instruments · RF Transceiver ICs · QFN-20-EP(4x4)

CC110LRGPR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial configuration interface clock input.
2 SO (GDO1) output Serial configuration interface data output; optional configurable general output pin when CSn is high.
3 GDO2 output Configurable digital output for test signals, FIFO status indication, clear channel assessment, clock outputs, and serial receive data.
4 DVDD power_in 1.8 to 3.6 V digital power supply for digital I/O and digital core voltage regulator.
5 DCOUPL power_out 1.6 to 2.0 V digital power supply output for decoupling, intended for use with CC110L only.
6 GDO0 bidirectional Configurable digital I/O pin for test signals, FIFO status, clear channel indicator, clock outputs, serial receive data output, and serial transmit data input.
7 CSn input Serial configuration interface chip select input (active low).
8 XOSC_Q1 bidirectional Crystal oscillator pin 1 or external clock input for 26-27 MHz reference signal.
9 AVDD power_in 1.8 to 3.6 V analog power supply connection.
10 XOSC_Q2 bidirectional Crystal oscillator pin 2.
11 AVDD power_in 1.8 to 3.6 V analog power supply connection.
12 RF_P bidirectional Positive RF input signal to LNA in receive mode or positive RF output signal from PA in transmit mode.
13 RF_N bidirectional Negative RF input signal to LNA in receive mode or negative RF output signal from PA in transmit mode.
14 AVDD power_in 1.8 to 3.6 V analog power supply connection.
15 AVDD power_in 1.8 to 3.6 V analog power supply connection.
16 GND power_in Analog ground connection.
17 RBIAS bidirectional External bias resistor connection for setting accurate reference current.
18 DGUARD power_in Power supply connection for digital noise isolation.
19 GND power_in Ground connection for digital noise isolation.
20 SI input Serial configuration interface data input.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(4x4)
Category RF And Wireless
Pins 21

CAD (KiCad official)

  • Symbol: CC110LRGPR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: cc110lrgpr-etched.step / cc110lrgpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cc110lrgpr.step / cc110lrgpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (95 pp, sha256 424f95236ec5c08c, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF