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Contents

README

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CBMV722AS8

Corebai Microelectronics · Low Noise Amplifiers (LNA) - RF · SOP-8

CBMV722AS8 from Corebai Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Amplifier A rail-to-rail output, with 70mA typical output short-circuit current.
2 -IN A input Amplifier A inverting input; input range -0.1V to 5.6V at Vs=5.5V and diode-clamped to the supply rails (limit to 10mA).
3 +IN A input Amplifier A non-inverting input; input range -0.1V to 5.6V at Vs=5.5V and diode-clamped to the supply rails (limit to 10mA).
4 V- power_in Negative supply, ground in single-supply use; supply V+ to V- is 2.5V to 5.5V (7.0V absolute maximum).
5 +IN B input Amplifier B non-inverting input; input range -0.1V to 5.6V at Vs=5.5V and diode-clamped to the supply rails (limit to 10mA).
6 -IN B input Amplifier B inverting input; input range -0.1V to 5.6V at Vs=5.5V and diode-clamped to the supply rails (limit to 10mA).
7 OUT B output Amplifier B rail-to-rail output, with 70mA typical output short-circuit current.
8 V+ power_in Positive supply, 2.5V to 5.5V operating (7.0V absolute maximum), with a 0.1uF capacitor placed closely across the supply pins.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package SOP-8
Category RF & Radio
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range Vs 2.5 5.5 V 25℃ 3
Quiescent Current/Amplifier IQ 1.15 1.4 mA 25℃ 3
Power-Supply Rejection Ratio PSRR 75 85 dB Vs=2.5V to 5.5V, Vcm=(V-)+0.5V, 25℃ 3
Power-Supply Rejection Ratio PSRR 65 dB Vs=2.5V to 5.5V, Vcm=(V-)+0.5V, -40℃ to 125℃ 3
Input Offset Voltage VOS 0.5 2.5 mV 25℃ 3
Input Offset Voltage Average Drift VOS TC 2.6 uV/℃ -40℃ to 125℃ 3
Input Bias Current IB 1 10 pA 25℃ 3
Input Offset Current Ios 1 10 pA 25℃ 3
Common-Mode Voltage Range Vcm -0.1 5.6 V Vs= 5.5V, 25℃ 4
Common-Mode Rejection Ratio CMRR 73 85 dB Vs= 5.5V, Vcm=-0.1V to 4V, 25℃ 4
Common-Mode Rejection Ratio CMRR 67 dB Vs= 5.5V, Vcm=-0.1V to 4V, -40℃ to 125℃ 4
Common-Mode Rejection Ratio CMRR 60 75 dB Vs= 5.5V, Vcm=-0.1V to 5.6V, 25℃ 4
Common-Mode Rejection Ratio CMRR 57 dB Vs= 5.5V, Vcm=-0.1V to 5.6V, -40℃ to 125℃ 4
Open-Loop Voltage Gain AOL 86 95 dB RL=2KΩ, Vo=0.15V to 4.85V, 25℃ 4
Open-Loop Voltage Gain AOL 65 dB RL=2KΩ, Vo=0.15V to 4.85V, -40℃ to 125℃ 4
Open-Loop Voltage Gain AOL 90 96 dB RL=10KΩ, Vo=0.05V to 4.95V, 25℃ 4
Open-Loop Voltage Gain AOL 66 dB RL=10KΩ, Vo=0.05V to 4.95V, -40℃ to 125℃ 4
Output Swing From Rail 52 mV RL=2KΩ, 25℃ 4
Output Swing From Rail 7 mV RL=10KΩ, 25℃ 4
Output Short-Circuit Current Iout 70 mA 25℃ 4
Slew Rate SR 7 V/us 25℃ 4
Gain-Bandwidth Product GBP 10 MHz 25℃ 4
Phase Margin PM 62 ° 25℃ 4
Setting Time, 0.1% ts 0.2 us 4
Overload Recovery Time 0.35 us VIN·Gain≥VS 4
Input Voltage Noise Density en 9.5 nV/√Hz f=1 KHz, 25℃ 4
Input Voltage Noise Density en 6.5 nV/√Hz f=10KHz, 25℃ 4
Input Terminal Voltage -0.5 0.5 V -0.5 to (V+)+0.5V; max is offset above V+ 2
Input Terminal Current -10 10 mA 2
Storage Temperature -65 150 °C 2
Operating Temperature -40 125 °C 2
Junction Temperature 150 °C 2
Package Thermal Resistance SOIC-8 150 °C/W MSOP-10, SOIC-8, TA = +25°C 2

CAD (KiCad official)

  • Symbol: CBMV722AS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cbmv722as8-etched.step / cbmv722as8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbmv722as8.step / cbmv722as8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (19 pp, sha256 8b91e39acb455539, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF