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CBM8541AST5

Corebai Microelectronics · Operational Amplifier · SOT-23-5

CBM8541AST5 from Corebai Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 OUT output Amplifier output with rail-to-rail swing, short-circuit current typically 55 mA.
2 V- power_in Negative supply (ground in single-supply use); supply range V+ to V- is 2.5V to 5.5V, absolute maximum 7.0V.
3 +IN input Non-inverting input with rail-to-rail range of -0.1V to 5.6V at Vs=5.5V, diode-clamped to the supply rails (limit current to 10mA).
4 -IN input Inverting input with rail-to-rail range of -0.1V to 5.6V at Vs=5.5V, diode-clamped to the supply rails (limit current to 10mA).
5 V+ power_in Positive supply, 2.5V to 5.5V relative to V-, absolute maximum 7.0V; place a 0.1uF capacitor across the supply pins.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package SOT-23-5
Category Amplifiers
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage Range Vs 2.5 5.5 V TJ 25℃ 4
Input Common-Mode Voltage Range Vcm -0.1 5.6 V Vs = 5.5V, 25℃ 4
Open-Loop Voltage Gain (RL=2kΩ) AOL 94 105 dB RL=2KΩ, Vo=0.15V to 4.85V, 25℃ 4
Open-Loop Voltage Gain (RL=2kΩ) AOL 85 dB RL=2KΩ, Vo=0.15V to 4.85V, -40℃ to 125℃ 4
Open-Loop Voltage Gain (RL=10kΩ) AOL 100 110 dB RL=10KΩ, Vo=0.05V to 4.95V, 25℃ 4
Open-Loop Voltage Gain (RL=10kΩ) AOL 90 dB RL=10KΩ, Vo=0.05V to 4.95V, -40℃ to 125℃ 4
Quiescent Current/Amplifier IQ 58 80 uA 25℃ 4
Power-Supply Rejection Ratio PSRR 72 90 dB Vs=2.5V to 5.5V, Vcm=(V-)+0.5V, 25℃ 4
Power-Supply Rejection Ratio PSRR 65 dB Vs=2.5V to 5.5V, Vcm=(V-)+0.5V, -40℃ to 125℃ 4
Input Offset Voltage Vos 0.6 3 mV 25℃ 4
Input Offset Voltage Average Drift Vos TC 2 uV/℃ -40℃ to 125℃ 4
Input Bias Current IB 1 10 pA 25℃ 4
Input Offset Current Ios 1 10 pA 25℃ 4
Common-Mode Rejection Ratio (Vcm=-0.1V to 4V) CMRR 71 90 dB Vs=5.5V, Vcm=-0.1V to 4V, 25℃ 4
Common-Mode Rejection Ratio (Vcm=-0.1V to 4V) CMRR 68 dB Vs=5.5V, Vcm=-0.1V to 4V, -40℃ to 125℃ 4
Common-Mode Rejection Ratio (Vcm=-0.1V to 5.6V) CMRR 60 80 dB Vs=5.5V, Vcm=-0.1V to 5.6V, 25℃ 4
Common-Mode Rejection Ratio (Vcm=-0.1V to 5.6V) CMRR 57 dB Vs=5.5V, Vcm=-0.1V to 5.6V, -40℃ to 125℃ 4
Output Swing From Rail (RL=2kΩ) 25 mV RL=2KΩ, 25℃ 4
Output Swing From Rail (RL=10kΩ) 8 mV RL=10KΩ, 25℃ 4
Supply Current in Shutdown IQ(OFF) 1 uA 25℃ 5
Input Terminals Voltage -0.5 V Referenced to supply rails; upper limit printed as (V+)+0.5V 2
Input Terminals Current -10 10 mA 2
Storage Temperature -65 150 °C 2
Operating Temperature -40 125 °C 2
Junction Temperature 150 °C 2
Package Thermal Resistance SOT23-5 200 °C/W TA=+25°C 2

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: CBM8541AST5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5, generated on the KiCad land (body 1.6 x 2.92 mm, terminals on the pads, 1.15 mm tall, datasheet A, midpoint of min and max). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: cbm8541ast5-etched.step / cbm8541ast5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm8541ast5.step / cbm8541ast5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (21 pp, sha256 5886251d55cb5c6e, retrieved 2026-11-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF