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CBM812LST4

Public Made by Adom

by adom

Corebai Microelectronics Supervisor And Reset ICs, SOT-143-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CBM812LST4

Corebai Microelectronics · Supervisor And Reset ICs · SOT-143-4

CBM812LST4 from Corebai Microelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Power supply ground, 0 V reference for the device.
2 RESET output For CBM812 this is the active-high reset output, which is driven high while reset is asserted when VCC is below the reset threshold or during the 240 ms (typ.) power-on timeout; maximum output current is 20 mA.
3 MR input Debounced manual reset input with an internal 10 kΩ to 30 kΩ pull-up (20 kΩ typ.); input signals shorter than 100 ns are ignored, pulses longer than 10 µs trigger reset, and maximum input current is 20 mA.
4 VCC power_in Supply voltage being monitored, specified for 2.5 V, 3 V, 3.3 V or 5 V systems; absolute maximum is −0.3 V to +6 V and the operating supply range is 1.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package SOT-143-4
Category Power Management (PMIC)
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage 1 5.5 V 5
Supply current 8 15 μA 5
Reset threshold (L variant) 4.54 4.63 4.72 V TA = −40°C to +85°C 5
Reset threshold (L variant, second row) 4.5 4.75 V TA = −40°C to +85°C 5
Manual reset minimum pulse width 10 μs 5
Fault immunity (MR input pulse rejected) 100 ns 5
Pull-up resistor (MR) 10 20 30 kΩ 5
Manual reset input high level 2.3 V 5
Manual reset input low level 0.8 V 5
Reset propagation delay 0.5 μs 5
VCC terminal voltage (relative to GND) VCC -0.3 6 V relative to GND 4
Input voltage range (relative to GND) -0.3 V relative to GND; upper limit printed as VCC + 0.3 V 4
VCC input current 20 mA 4
MR input current 20 mA 4
RESET output current 20 mA 4
Power dissipation (SOT-143) 200 mW TA = 70°C 4
Thermal resistance junction to ambient (θJA) θJA 330 °C/W 4
Operating temperature range -40 85 °C 4
Storage temperature range -65 160 °C 4
Pin temperature (soldering) 300 °C soldering, 10 s 4
Pin temperature (vapor phase) 215 °C vapor phase, 60 s 4
Pin temperature (infrared) 220 °C infrared, 15 s 4
ESD rating 3 kV ESD model not stated 4

CAD (KiCad official)

  • Symbol: CBM812LST4
  • Footprint: Package_TO_SOT_SMD:SOT-143
  • 3D model: SOT-143-4 (KiCad packages3D, STEP)
  • 3D model files: cbm812lst4-etched.step / cbm812lst4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm812lst4.step / cbm812lst4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (10 pp, sha256 518b6bc98fa4ffea, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF