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CBM811RST4
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Corebai Microelectronics Monitors & Reset Circuits, SOT-143-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CBM811RST4
Corebai Microelectronics · Monitors & Reset Circuits · SOT-143-4
CBM811RST4 from Corebai Microelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power supply ground, 0 V. |
| 2 | RESET | output | Active-low logic reset output for the CBM811 variant, which remains asserted low down to VCC of 1 V during power-down. |
| 3 | MR | input | Debounced manual reset input; input signals shorter than 100 ns are ignored and inputs longer than 10 µs reliably trigger reset. |
| 4 | VCC | power_in | Monitored supply voltage input for 2.5 V, 3 V, 3.3 V or 5 V systems, with an absolute maximum rating of −0.3 V to +6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOT-143-4 |
| Category | Power Management |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1 | 5.5 | V | 5 | ||
| Supply current | ICC | 8 | 15 | μA | 5 | ||
| Reset threshold CBM811R/CBM812R (min row) | VTH | 2.58 | 2.63 | 2.68 | V | TA = −40°C to +85°C | 5 |
| Reset threshold CBM811R/CBM812R (wide tolerance row) | VTH | 2.55 | 2.7 | V | TA = −40°C to +85°C | 5 | |
| Manual reset minimum pulse width | 10 | μs | 5 | ||||
| Fault immunity (manual reset input noise rejection) | 100 | ns | 5 | ||||
| Transfer delay to reset | 0.5 | μs | 5 | ||||
| Manual reset pull-up resistor | 10 | 20 | 30 | kΩ | 5 | ||
| Power-up reset timeout | 140 | ms | 1 | ||||
| Reset output hold time after VCC above threshold | 240 | ms | 8 | ||||
| VCC terminal voltage (relative to GND) | VCC | -0.3 | 6 | V | relative to GND | 4 | |
| Input voltage range | VIN | -0.3 | V | relative to GND; upper limit VCC + 0.3 V | 4 | ||
| VCC input current | ICC | 20 | mA | 4 | |||
| MR input current | IMR | 20 | mA | 4 | |||
| RESET output current | IRESET | 20 | mA | 4 | |||
| Power dissipation (SOT-143) | PD | 200 | mW | TA = 70°C | 4 | ||
| Power dissipation derating | 4 | mW/°C | above 70°C | 4 | |||
| Thermal resistance junction to ambient | θJA | 330 | °C/W | 4 | |||
| Operating temperature range | TA | -40 | 85 | °C | 4 | ||
| Storage temperature range | TSTG | -65 | 160 | °C | 4 | ||
| Lead temperature (soldering, 10 s) | 300 | °C | soldering, 10 s | 4 | |||
| Vapor phase temperature | 215 | °C | 60 s | 4 | |||
| Infrared temperature | 220 | °C | 15 s | 4 | |||
| ESD rating | 3 | kV | 4 |
CAD (KiCad official)
- Symbol:
CBM811RST4 - Footprint:
Package_TO_SOT_SMD:SOT-143 - 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files:
cbm811rst4-etched.step/cbm811rst4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cbm811rst4.step/cbm811rst4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Corebai Microelectronics datasheet (10 pp, sha256
bbff3e5248124a6f, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CBM811RST4
**Corebai Microelectronics** · Monitors & Reset Circuits · SOT-143-4
CBM811RST4 from Corebai Microelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power supply ground, 0 V. |
| 2 | RESET | output | Active-low logic reset output for the CBM811 variant, which remains asserted low down to VCC of 1 V during power-down. |
| 3 | MR | input | Debounced manual reset input; input signals shorter than 100 ns are ignored and inputs longer than 10 µs reliably trigger reset. |
| 4 | VCC | power_in | Monitored supply voltage input for 2.5 V, 3 V, 3.3 V or 5 V systems, with an absolute maximum rating of −0.3 V to +6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOT-143-4 |
| Category | Power Management |
| Pins | 4 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1 | | 5.5 | V | | 5 |
| Supply current | ICC | | 8 | 15 | μA | | 5 |
| Reset threshold CBM811R/CBM812R (min row) | VTH | 2.58 | 2.63 | 2.68 | V | TA = −40°C to +85°C | 5 |
| Reset threshold CBM811R/CBM812R (wide tolerance row) | VTH | 2.55 | | 2.7 | V | TA = −40°C to +85°C | 5 |
| Manual reset minimum pulse width | | 10 | | | μs | | 5 |
| Fault immunity (manual reset input noise rejection) | | | 100 | | ns | | 5 |
| Transfer delay to reset | | | 0.5 | | μs | | 5 |
| Manual reset pull-up resistor | | 10 | 20 | 30 | kΩ | | 5 |
| Power-up reset timeout | | 140 | | | ms | | 1 |
| Reset output hold time after VCC above threshold | | | 240 | | ms | | 8 |
| VCC terminal voltage (relative to GND) | VCC | -0.3 | | 6 | V | relative to GND | 4 |
| Input voltage range | VIN | -0.3 | | | V | relative to GND; upper limit VCC + 0.3 V | 4 |
| VCC input current | ICC | | | 20 | mA | | 4 |
| MR input current | IMR | | | 20 | mA | | 4 |
| RESET output current | IRESET | | | 20 | mA | | 4 |
| Power dissipation (SOT-143) | PD | | | 200 | mW | TA = 70°C | 4 |
| Power dissipation derating | | | 4 | | mW/°C | above 70°C | 4 |
| Thermal resistance junction to ambient | θJA | | 330 | | °C/W | | 4 |
| Operating temperature range | TA | -40 | | 85 | °C | | 4 |
| Storage temperature range | TSTG | -65 | | 160 | °C | | 4 |
| Lead temperature (soldering, 10 s) | | | | 300 | °C | soldering, 10 s | 4 |
| Vapor phase temperature | | | | 215 | °C | 60 s | 4 |
| Infrared temperature | | | | 220 | °C | 15 s | 4 |
| ESD rating | | | | 3 | kV | | 4 |
## CAD (KiCad official)
- Symbol: `CBM811RST4`
- Footprint: `Package_TO_SOT_SMD:SOT-143`
- 3D model: SOT-143-4 (KiCad packages3D, STEP)
- 3D model files: `cbm811rst4-etched.step` / `cbm811rst4-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cbm811rst4.step` / `cbm811rst4.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Corebai Microelectronics datasheet](docs/cbm811rst4-datasheet.pdf) (10 pp, sha256 `bbff3e5248124a6f`, retrieved 2026-10-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cbm811rst4-datasheet.pdf)