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CBM708AS8
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Corebai Microelectronics Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CBM708AS8
Corebai Microelectronics · Monitors & Reset Circuits · SOIC-8
CBM708AS8 from Corebai Microelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual reset input: a reset is generated when this pin is taken below 0.8 V, and an internal 250 µA pull-up holds it high when floating. |
| 2 | VCC | power_in | 5 V power supply input; place a 0.1 µF decoupling capacitor between VCC and GND. |
| 3 | GND | power_in | 0 V ground reference for all signals. |
| 4 | PFI | input | Power fail input, the noninverting input to the power fail comparator; when PFI is below 1.25 V, PFO goes low, and if unused it must be connected to GND. |
| 5 | PFO | output | Power fail output from the power fail comparator; it goes low when PFI is less than 1.25 V. |
| 6 | NC | unconnected | No connect; not internally connected on the CBM707/CBM708 SOIC package. |
| 7 | RESET | output | Active-low logic output that goes low for 200 ms when VCC is below the reset threshold (4.40 V for CBM708) or MR is pulled low, and stays low until 200 ms after VCC rises above the threshold or MR goes high. |
| 8 | RESET | output | Active-high reset output, the inverse of RESET, for systems that use active-high reset logic. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | 5.5 | V | 3 | ||
| Supply Current | 190 | 250 | μA | 3 | |||
| Reset Threshold | 4.25 | 4.4 | 4.5 | V | CBM706/CBM708 | 3 | |
| RESET Pulse Width | 160 | 200 | 280 | ms | 3 | ||
| RESET Output Voltage (low) | 0.4 | V | ISINK = 3.2 mA | 3 | |||
| RESET Output Voltage (low) | 0.3 | V | VCC = 1 V, ISINK = 50 µA | 3 | |||
| RESET Output Voltage (low, active-high part output) | 0.4 | V | CBM707/CBM708, ISINK = 1.2 mA | 3 | |||
| MR Pull-Up Current | 100 | 250 | 600 | µA | MR = 0V | 3 | |
| MR Pulse Width | 150 | ns | 3 | ||||
| MR Input Threshold Logic Low | 0.8 | V | 3 | ||||
| MR Input Threshold Logic High | 2 | V | 3 | ||||
| PFI Input Threshold | 1.2 | 1.25 | 1.3 | V | 3 | ||
| PFI Input Current | -25 | 0.01 | 25 | nA | 3 | ||
| PFO Output Voltage (low) | 0.4 | V | ISINK = 3.2 mA | 3 | |||
| VCC Supply Voltage (absolute) | VCC | -0.3 | 6 | V | 4 | ||
| All Other Inputs | -0.3 | V | 4 | ||||
| Input Current (VCC pin) | 20 | mA | 4 | ||||
| Input Current (GND pin) | 20 | mA | 4 | ||||
| Digital Output Current | 20 | mA | 4 | ||||
| Power Dissipation, R-8 SOIC | 470 | mW | 4 | ||||
| θJA Thermal Impedance, R-8 SOIC | θJA | 110 | ℃/W | 4 | |||
| Operating Temperature Range, Industrial (Version A) | -40 | 85 | ℃ | Industrial (Version A) | 4 | ||
| Storage Temperature Range | -65 | 150 | ℃ | 4 | |||
| Lead Temperature (Soldering) | 300 | ℃ | 10 sec | 4 | |||
| Lead Temperature (Vapor Phase) | 215 | ℃ | Vapor Phase (60 sec) | 4 | |||
| Lead Temperature (Infrared) | 220 | ℃ | Infrared (15 sec) | 4 | |||
| ESD Rating | 4.5 | kV | 4 |
CAD (KiCad official)
- Symbol:
CBM708AS8 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
cbm708as8-etched.step/cbm708as8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cbm708as8.step/cbm708as8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Corebai Microelectronics datasheet (18 pp, sha256
3801fabe2d46d615, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CBM708AS8
**Corebai Microelectronics** · Monitors & Reset Circuits · SOIC-8
CBM708AS8 from Corebai Microelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual reset input: a reset is generated when this pin is taken below 0.8 V, and an internal 250 µA pull-up holds it high when floating. |
| 2 | VCC | power_in | 5 V power supply input; place a 0.1 µF decoupling capacitor between VCC and GND. |
| 3 | GND | power_in | 0 V ground reference for all signals. |
| 4 | PFI | input | Power fail input, the noninverting input to the power fail comparator; when PFI is below 1.25 V, PFO goes low, and if unused it must be connected to GND. |
| 5 | PFO | output | Power fail output from the power fail comparator; it goes low when PFI is less than 1.25 V. |
| 6 | NC | unconnected | No connect; not internally connected on the CBM707/CBM708 SOIC package. |
| 7 | RESET | output | Active-low logic output that goes low for 200 ms when VCC is below the reset threshold (4.40 V for CBM708) or MR is pulled low, and stays low until 200 ms after VCC rises above the threshold or MR goes high. |
| 8 | RESET | output | Active-high reset output, the inverse of RESET, for systems that use active-high reset logic. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | | 5.5 | V | | 3 |
| Supply Current | | | 190 | 250 | μA | | 3 |
| Reset Threshold | | 4.25 | 4.4 | 4.5 | V | CBM706/CBM708 | 3 |
| RESET Pulse Width | | 160 | 200 | 280 | ms | | 3 |
| RESET Output Voltage (low) | | | | 0.4 | V | ISINK = 3.2 mA | 3 |
| RESET Output Voltage (low) | | | | 0.3 | V | VCC = 1 V, ISINK = 50 µA | 3 |
| RESET Output Voltage (low, active-high part output) | | | | 0.4 | V | CBM707/CBM708, ISINK = 1.2 mA | 3 |
| MR Pull-Up Current | | 100 | 250 | 600 | µA | MR = 0V | 3 |
| MR Pulse Width | | 150 | | | ns | | 3 |
| MR Input Threshold Logic Low | | | | 0.8 | V | | 3 |
| MR Input Threshold Logic High | | 2 | | | V | | 3 |
| PFI Input Threshold | | 1.2 | 1.25 | 1.3 | V | | 3 |
| PFI Input Current | | -25 | 0.01 | 25 | nA | | 3 |
| PFO Output Voltage (low) | | | | 0.4 | V | ISINK = 3.2 mA | 3 |
| VCC Supply Voltage (absolute) | VCC | -0.3 | | 6 | V | | 4 |
| All Other Inputs | | -0.3 | | | V | | 4 |
| Input Current (VCC pin) | | | | 20 | mA | | 4 |
| Input Current (GND pin) | | | | 20 | mA | | 4 |
| Digital Output Current | | | | 20 | mA | | 4 |
| Power Dissipation, R-8 SOIC | | | | 470 | mW | | 4 |
| θJA Thermal Impedance, R-8 SOIC | θJA | | | 110 | ℃/W | | 4 |
| Operating Temperature Range, Industrial (Version A) | | -40 | | 85 | ℃ | Industrial (Version A) | 4 |
| Storage Temperature Range | | -65 | | 150 | ℃ | | 4 |
| Lead Temperature (Soldering) | | | | 300 | ℃ | 10 sec | 4 |
| Lead Temperature (Vapor Phase) | | | | 215 | ℃ | Vapor Phase (60 sec) | 4 |
| Lead Temperature (Infrared) | | | | 220 | ℃ | Infrared (15 sec) | 4 |
| ESD Rating | | 4.5 | | | kV | | 4 |
## CAD (KiCad official)
- Symbol: `CBM708AS8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `cbm708as8-etched.step` / `cbm708as8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cbm708as8.step` / `cbm708as8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Corebai Microelectronics datasheet](docs/cbm708as8-datasheet.pdf) (18 pp, sha256 `3801fabe2d46d615`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cbm708as8-datasheet.pdf)