component

CBM707AS8

Public Made by Adom

by adom

Corebai Microelectronics Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icscbm707as8factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers cbm707as8: viewers · Ray 17d ago
cbm707as8-etched.glb Publish 0.1.0 · Ray 17d ago
cbm707as8-etched.step cbm707as8: factory component page (tier=lcsc) · Ray 17d ago
cbm707as8-hero.glb cbm707as8: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
cbm707as8-hero.overlay.json Publish 0.1.0 · Ray 17d ago
cbm707as8.glb Publish 0.1.0 · Ray 17d ago
cbm707as8.kicad_mod Publish 0.1.0 · Ray 17d ago
cbm707as8.kicad_sym Publish 0.1.0 · Ray 17d ago
cbm707as8.lbr Publish 0.1.0 · Ray 17d ago
cbm707as8.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

CBM707AS8

Corebai Microelectronics · Monitors & Reset Circuits · SOIC-8

CBM707AS8 from Corebai Microelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Active-low debounced manual reset input that generates a reset when taken below 0.8V, drivable from TTL, CMOS logic or a switch, with an internal 250μA pull-up holding it high when floating.
2 VCC power_in 5V power supply input, with a 0.1μF decoupling capacitor placed between VCC and GND.
3 GND power_in 0V ground reference for all signals.
4 PFI input Noninverting input of the power fail comparator that drives PFO low when below 1.25V, and must be connected to GND if unused.
5 PFO output Power fail comparator output that goes low when PFI is less than 1.25V.
6 NC unconnected No connect.
7 RESET output Active-low logic output that goes low for 200ms when triggered by VCC below the reset threshold (4.65V for CBM707) or by a low on MR, and stays low for 200ms after VCC rises above the threshold or MR goes high.
8 RESET output Active-high logic output, the inverse of the active-low RESET, for systems that use active-high reset logic.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Operating Voltage Range VCC 1 5.5 V 3
Supply Current 190 250 µA VCC = 4.75 V to 5.5 V, TA = TMIN to TMAX 3
Reset Threshold 4.5 4.65 4.75 V CBM705/CBM707 3
Reset Threshold Hysteresis 40 mV 3
Reset Pulse Width 160 200 280 ms 3
RESET Output Voltage Low 0.4 V ISINK = 3.2 mA 3
RESET Output Voltage Low at VCC = 1 V 0.3 V VCC = 1 V, ISINK = 50 µA 3
RESET Output Voltage Low at VCC = 1.2 V 0.3 V VCC = 1.2 V, ISINK = 100 µA 3
RESET (active high) Output Voltage Low 0.4 V CBM707/CBM708, ISINK = 1.2 mA 3
MR Pull-Up Current 100 250 600 µA MR = 0V 3
MR Pulse Width 150 ns 3
MR Input Threshold Logic Low 0.8 V 3
MR Input Threshold Logic High 2 V 3
MR to RESET Output Delay 250 ns 3
PFI Input Threshold 1.2 1.25 1.3 V 3
PFI Input Current -25 0.01 25 nA 3
PFO Output Voltage Low 0.4 V ISINK = 3.2 mA 3
VCC Supply Voltage VCC -0.3 6 V TA = 25°C 4
All Other Inputs -0.3 V upper limit printed as VCC+0.3V 4
Input Current VCC 20 mA 4
Input Current GND 20 mA 4
Digital Output Current 20 mA 4
Power Dissipation, R-8 SOIC 470 mW 4
θJA Thermal Impedance, R-8 SOIC θJA 110 ℃/W 4
Operating Temperature Range, Industrial (Version A) -40 85 ℃ 4
Operating Temperature Range (ordering table) -40 125 ℃ CBM707AS8 18
Lead Temperature (Soldering) 300 ℃ 10 sec 4
Vapor Phase Temperature 215 ℃ 60 sec 4
Infrared Temperature 220 ℃ 15 sec 4
Storage Temperature Range -65 150 ℃ 4
ESD Rating 4.5 kV printed as >4.5kV 4

CAD (KiCad official)

  • Symbol: CBM707AS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cbm707as8-etched.step / cbm707as8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm707as8.step / cbm707as8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (18 pp, sha256 3801fabe2d46d615, retrieved 2026-10-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF