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Initial commit: component/cbm6002as8

Ray ·d9252b5bcd ·
2 files changed +187
README.mdadded+44
@@ -0,0 +1,44 @@+# CBM6002AS8++**Corebai Microelectronics** · Low Noise Amplifiers (LNA) - RF · SOP-8++CBM6002AS8 from Corebai Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUTA | output | Output of amplifier A; rail-to-rail swing to within 5mV of supply rail at RL=100kΩ, 60mV at RL=10kΩ; source/sink current 60mA min at VS=5V. |+| 2 | INA- | input | Inverting input of amplifier A; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V. |+| 3 | INA+ | input | Non-inverting input of amplifier A; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V. |+| 4 | VSS | power_in | Negative supply / ground rail; single-supply ground or negative rail of dual supply (±0.9V to ±3V); bypass to VDD with 0.1µF ceramic capacitor close to pin. |+| 5 | INB+ | input | Non-inverting input of amplifier B; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V. |+| 6 | INB- | input | Inverting input of amplifier B; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V. |+| 7 | OUTB | output | Output of amplifier B; rail-to-rail swing to within 5mV of supply rail at RL=100kΩ, 60mV at RL=10kΩ; source/sink current 60mA min at VS=5V. |+| 8 | VDD | power_in | Positive supply; operating range 1.8V to 6V single supply (absolute max 7.5V); bypass with 0.1µF ceramic capacitor placed close to pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Corebai Microelectronics |+| Package | SOP-8 |+| Category | RF And Wireless |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `CBM6002AS8`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)+- 3D model files: `cbm6002as8-etched.step` / `cbm6002as8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cbm6002as8.step` / `cbm6002as8.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Corebai Microelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588949197596315649) (18 pp, sha256 `35c209e7eaa6de70`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-4-6` (text+vision), consensus `claude-opus-4-7` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cbm6002as8-datasheet.pdf)
page.jsonadded+143
@@ -0,0 +1,143 @@+{+  "slug": "cbm6002as8",+  "version": "0.1.0",+  "type": "component",+  "description": "Corebai Microelectronics Low Noise Amplifiers (LNA) - RF, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "rf and wireless",+    "cbm6002as8",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cbm6002as8.kicad_sym",+    "cbm6002as8.kicad_mod",+    "cbm6002as8.glb",+    "cbm6002as8.step",+    "cbm6002as8.lbr",+    "docs/hero.png",+    "docs/cbm6002as8-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CBM6002AS8",+    "manufacturer": "Corebai Microelectronics",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "RF And Wireless",+    "subcategory": "Low Noise Amplifiers (LNA) - RF",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588949197596315649",+    "parts": {+      "symbol": "cbm6002as8.kicad_sym",+      "footprint": "cbm6002as8.kicad_mod",+      "model_3d": "cbm6002as8-etched.glb",+      "model_3d_plain": "cbm6002as8.glb",+      "model_3d_step": "cbm6002as8-etched.step",+      "model_3d_step_plain": "cbm6002as8.step",+      "lbr": "cbm6002as8.lbr"+    },+    "distributor_links": {+      "lcsc": "C476400"+    },+    "pins": [+      {+        "number": "1",+        "name": "OUTA",+        "type": "output",+        "description": "Output of amplifier A; rail-to-rail swing to within 5mV of supply rail at RL=100kΩ, 60mV at RL=10kΩ; source/sink current 60mA min at VS=5V."+      },+      {+        "number": "2",+        "name": "INA-",+        "type": "input",+        "description": "Inverting input of amplifier A; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V."+      },+      {+        "number": "3",+        "name": "INA+",+        "type": "input",+        "description": "Non-inverting input of amplifier A; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground rail; single-supply ground or negative rail of dual supply (±0.9V to ±3V); bypass to VDD with 0.1µF ceramic capacitor close to pin."+      },+      {+        "number": "5",+        "name": "INB+",+        "type": "input",+        "description": "Non-inverting input of amplifier B; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V."+      },+      {+        "number": "6",+        "name": "INB-",+        "type": "input",+        "description": "Inverting input of amplifier B; input bias current 1pA typ, common-mode range VSS−0.1V to VDD+0.1V."+      },+      {+        "number": "7",+        "name": "OUTB",+        "type": "output",+        "description": "Output of amplifier B; rail-to-rail swing to within 5mV of supply rail at RL=100kΩ, 60mV at RL=10kΩ; source/sink current 60mA min at VS=5V."+      },+      {+        "number": "8",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply; operating range 1.8V to 6V single supply (absolute max 7.5V); bypass with 0.1µF ceramic capacitor placed close to pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-4-6",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-4-7",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 18,+        "cost_usd": 0.3327,+        "at": "2026-09-22T02:39:30"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588949197596315649",+        "pages": 18,+        "sha256": "35c209e7eaa6de70",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file