main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers cbm2901as14: viewers · Ray 10d ago
cbm2901as14-etched.glb Publish 0.1.0 · Ray 10d ago
cbm2901as14-etched.step cbm2901as14: factory component page (tier=lcsc) · Ray 10d ago
cbm2901as14-hero.glb cbm2901as14: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
cbm2901as14-hero.overlay.json Publish 0.1.0 · Ray 10d ago
cbm2901as14.glb Publish 0.1.0 · Ray 10d ago
cbm2901as14.kicad_mod Publish 0.1.0 · Ray 10d ago
cbm2901as14.kicad_sym Publish 0.1.0 · Ray 10d ago
cbm2901as14.lbr Publish 0.1.0 · Ray 10d ago
cbm2901as14.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago

CBM2901AS14

Corebai Microelectronics · Comparators · SOP-14

CBM2901AS14 from Corebai Microelectronics, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT2 output Open-collector output of comparator 2; unused outputs must be left open.
2 OUT1 output Open-collector output of comparator 1; unused outputs must be left open.
3 VCC power_in Positive supply; 5.0 to 30 V single supply (±2.5 to ±15 V split), 36 V (±18 V) absolute maximum.
4 IN1(-) input Inverting input of comparator 1; keep within GND to VCC and tie unused inputs to GND or VCC.
5 IN1(+) input Non-inverting input of comparator 1; keep within GND to VCC and tie unused inputs to GND or VCC.
6 IN2(-) input Inverting input of comparator 2; keep within GND to VCC and tie unused inputs to GND or VCC.
7 IN2(+) input Non-inverting input of comparator 2; keep within GND to VCC and tie unused inputs to GND or VCC.
8 IN3(-) input Inverting input of comparator 3; keep within GND to VCC and tie unused inputs to GND or VCC.
9 IN3(+) input Non-inverting input of comparator 3; keep within GND to VCC and tie unused inputs to GND or VCC.
10 IN4(-) input Inverting input of comparator 4; keep within GND to VCC and tie unused inputs to GND or VCC.
11 IN4(+) input Non-inverting input of comparator 4; keep within GND to VCC and tie unused inputs to GND or VCC.
12 GND power_in Ground (negative supply for split-supply operation).
13 OUT4 output Open-collector output of comparator 4; unused outputs must be left open.
14 OUT3 output Open-collector output of comparator 3; unused outputs must be left open.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package SOP-14
Category Amplifiers/Comparators
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (@25℃) VIO 5 mV @25℃; V0=1.4V; VCC=5.0-30V; RS≤100Ω; VICR=0V-(VCC-1.5)V 3
Input offset voltage VIO 9 mV V0=1.4V; VCC=5.0-30V; RS≤100Ω; VICR=0V-(VCC-1.5)V 3
Input bias current IIB 400 nA V0=1.4V; VCC=5.0-30V; VICR=0V-(VCC-1.5)V 3
Input offset current IIO -150 150 nA V0=1.4V; VCC=5.0-30V; VICR=0V-(VCC-1.5)V 3
Input common mode voltage range (lower limit 0 V; upper limit printed as VCC-2.0V, not numeric) VICR 0 V VCC=5.0-30V 3
Output sink current Isink 6 mA VI(-)=1.0V, VI(+)=0V, V0≤1.5V, VCC=5.0V 3
Saturation voltage Vsat 700 mV VI(-)=1.0V, VI(+)=0V, Isink≤4.0mA, VCC=5.0V 3
Output leakage current (@25℃) IOL 0.1 nA @25℃; VI(+)=1.0V, VI(-)=0V, V0=5.0V 3
Output leakage current IOL 1000 nA VI(+)=1.0V, VI(-)=0V, V0=30V 3
Supply current (@25℃) ICC 2 mA @25℃; RL=∞, VCC=5.0 3
Supply current (@25℃) ICC 2.5 mA @25℃; RL=∞, VCC=30V 3
Supply voltage, single supply VCC 36 V Single supply 2
Supply voltage, split supplies (printed ±18) VCC -18 18 V Split supplies (±18 V) 2
Input differential voltage range VIDR 36 V 2
Input common mode voltage range (lower limit; upper limit printed as VCC) VICR -0.3 V Note 1: split power supplies 2
Input current, per pin IIN 50 mA Note 2: VIN<-0.3V 2
Junction temperature TJ 150 ℃ Plastic packages 2
Storage temperature Tstg -65 150 ℃ 2
Lead temperature TL 260 ℃ 1mm from case for 10 seconds 2
Power dissipation PD 1 W TA=25℃, plastic package 2
DC supply voltage, single supply VCC 5 30 V Single supply; TA=-40~85℃ 2
DC supply voltage, split supplies (printed ±2.5 to ±15) VCC 2.5 15 V Split supplies (±); TA=-40~85℃ 2
Operating temperature, all package types TA -40 85 ℃ 2

CAD (KiCad official)

  • Symbol: CBM2901AS14
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cbm2901as14-etched.step / cbm2901as14-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm2901as14.step / cbm2901as14.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (6 pp, sha256 0cf3c0ad0b823abb, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF