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CBM24AD98Q

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Corebai Microelectronics Analog To Digital Converters (ADC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CBM24AD98Q

Corebai Microelectronics · Analog To Digital Converters (ADC) · TQFP-64(10x10)

CBM24AD98Q from Corebai Microelectronics, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN8N input Differential analog negative input 8; unused analog inputs connect directly to AVDD.
2 IN8P input Differential analog positive input 8; unused analog inputs connect directly to AVDD.
3 IN7N input Differential analog negative input 7; unused analog inputs connect directly to AVDD.
4 IN7P input Differential analog positive input 7; unused analog inputs connect directly to AVDD.
5 IN6N input Differential analog negative input 6; unused analog inputs connect directly to AVDD.
6 IN6P input Differential analog positive input 6; unused analog inputs connect directly to AVDD.
7 IN5N input Differential analog negative input 5; unused analog inputs connect directly to AVDD.
8 IN5P input Differential analog positive input 5; unused analog inputs connect directly to AVDD.
9 IN4N input Differential analog negative input 4; unused analog inputs connect directly to AVDD.
10 IN4P input Differential analog positive input 4; unused analog inputs connect directly to AVDD.
11 IN3N input Differential analog negative input 3; unused analog inputs connect directly to AVDD.
12 IN3P input Differential analog positive input 3; unused analog inputs connect directly to AVDD.
13 IN2N input Differential analog negative input 2; unused analog inputs connect directly to AVDD.
14 IN2P input Differential analog positive input 2; unused analog inputs connect directly to AVDD.
15 IN1N input Differential analog negative input 1; unused analog inputs connect directly to AVDD.
16 IN1P input Differential analog positive input 1; unused analog inputs connect directly to AVDD.
17 SRB1/TESTP_PACE_OUT1 bidirectional Excitation, reference and bias signal 1, or pacemaker detection signal 1 (analog input/output).
18 SRB2/TESTP_PACE_OUT2 bidirectional Excitation, reference and bias signal 2, or pacemaker detection signal 2 (analog input/output).
19 AVDD power_in Analog supply; connect a 1 µF capacitor to AVSS.
20 AVSS power_in Analog ground.
21 AVDD power_in Analog supply; connect a 1 µF capacitor to AVSS.
22 AVDD power_in Analog supply; connect a 1 µF capacitor to AVSS.
23 AVSS power_in Analog ground.
24 VREFP bidirectional Positive analog reference voltage; connect a minimum 10 µF capacitor between VREFP and VREFN.
25 VREFN input Negative analog reference voltage.
26 VCAP4 output Analog bypass capacitor pin; connect a 1 µF capacitor to AVSS.
27 NC unconnected No connection; leave open.
28 VCAP1 output Analog bypass capacitor pin; connect a 100 µF capacitor to AVSS.
29 NC unconnected No connection; leave open.
30 VCAP2 output Analog bypass capacitor pin; connect a 1 µF capacitor to AVSS.
31 RESV1 input Reserved for future use; connect directly to DGND.
32 AVSS power_in Analog ground.
33 DGND power_in Digital ground.
34 DIN input Serial data input; data is shifted into the chip on the falling edge of SCLK.
35 PWDN_ input Power-down, active low; when pulled low, all on-chip circuits are shut down.
36 RESET_ input System reset, active low.
37 CLK input Master clock input.
38 START input Synchronization signal to start or restart conversions.
39 CS_ input Chip select, active low; must be low for the entire SPI communication cycle.
40 SCLK input Serial clock input; a Schmitt-trigger input, best kept free of noise.
41 DAISY_IN input Daisy-chain input.
42 GPIO1 bidirectional General-purpose input/output pin 1; if unused, connect to DGND through a resistor of 10 kΩ or more.
43 DOUT output Serial data output; data is shifted out MSB first on the SCLK rising edge and is high impedance when CS_ is high.
44 GPIO2 bidirectional General-purpose input/output pin 2; if unused, connect to DGND through a resistor of 10 kΩ or more.
45 GPIO3 bidirectional General-purpose input/output pin 3; if unused, connect to DGND through a resistor of 10 kΩ or more.
46 GPIO4 bidirectional General-purpose input/output pin 4; if unused, connect to DGND through a resistor of 10 kΩ or more.
47 DRDY_ output Data ready, active low; indicates new conversion data is available.
48 DVDD power_in Digital supply; connect a 1 µF capacitor to DGND.
49 DGND power_in Digital ground.
50 DVDD power_in Digital supply; connect a 1 µF capacitor to DGND.
51 DGND power_in Digital ground.
52 CLKSEL input Master clock select; set high to DVDD or low to DGND through a resistor of 10 kΩ or more.
53 AVSS1 power_in Analog ground.
54 AVDD1 power_in Analog supply; connect a 1 µF capacitor to AVSS1.
55 VCAP3 output Analog bypass capacitor pin; connect a parallel combination of 1 µF and 0.1 µF capacitors to AVSS.
56 AVDD power_in Analog supply; connect a 1 µF capacitor to AVSS.
57 AVSS power_in Analog ground.
58 AVSS power_in Charge-pump analog ground.
59 AVDD power_in Charge-pump analog supply; connect a 1 µF capacitor to AVSS (pin 58).
60 BIASREF/RLDREF input Bias or right-leg-drive non-inverting input (analog input).
61 BIASINV/RLDINV bidirectional Bias or right-leg-drive inverting input (analog input/output).
62 BIASIN/RLDIN input Bias or right-leg-drive input to the multiplexer (analog input).
63 BIASOUT/RLDOUT output Bias or right-leg-drive output (analog output).
64 WCT output Wilson central terminal output (analog output).

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package TQFP-64(10x10)
Category Data Acquisition
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Recommended analog supply AVDD to AVSS AVDD 4.75 5 5.25 V AVDD to AVSS 6
Recommended digital supply DVDD to DGND DVDD 1.8 1.8 3.6 V DVDD to DGND 6
Recommended analog-to-digital supply difference AVDD - DVDD -2.1 3.6 V 6
External clock input frequency 1.5 2.048 2.25 MHz External clock input, CLKSEL pin = 0 7
Operating temperature range -40 85 ℃ 7
Analog supply AVDD to AVSS absolute maximum AVDD -0.3 5.5 V 6
Digital supply DVDD to DGND absolute maximum DVDD -0.3 3.9 V 6
AVSS to DGND absolute maximum AVSS -3 0.2 V 6
Input current, continuous, any pin except supply pins -10 10 mA Continuous, any pin except supply pins 6
Junction temperature absolute maximum TJ 150 ℃ 6
Storage temperature Tstg -60 150 ℃ 6
ESD human body model (HBM) V(ESD) -1000 1000 V HBM, ANSI/ESDA/JEDEC JS-001 6
Input bias current -200 200 pA TA = 25°C, input = 1.5 V 7
Input bias current -1 1 nA TA = 0°C to 70°C, input = 1.5 V 7
Input bias current -1.2 1.2 nA TA = -40°C to +85°C, input = 1.5 V 7
Data rate (HR mode) 500 32000 SPS fCLK = 2.048 MHz, HR mode 7
Data rate (LP mode) 250 16000 SPS fCLK = 2.048 MHz, LP mode 7
Offset error -500 500 µV 8
Input-referred noise 4 7 μVPP Gain = 6, 256 points, 0.5 s of data 8
Gain error -0.5 0.5 占 FS 的百分比 Excludes voltage reference error 8
Common-mode rejection ratio (CMRR) -105 -115 dB fCM = 50 Hz, 60 Hz 8
Short-circuit current -0.25 0.25 mA 8
Junction-to-ambient thermal resistance 46.2 ℃/W Junction to ambient, TQFP 64 pin 7
Junction-to-case (top) thermal resistance 5.8 ℃/W Junction to case (top), TQFP 64 pin 7
Junction-to-board thermal resistance 19.6 ℃/W Junction to board, TQFP 64 pin 7
Junction-to-top characterization parameter 0.2 ℃/W Junction to top, TQFP 64 pin 7
Junction-to-board characterization parameter 19.2 ℃/W Junction to board, TQFP 64 pin 7

CAD (KiCad official)

  • Symbol: CBM24AD98Q
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: cbm24ad98q-etched.step / cbm24ad98q-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm24ad98q.step / cbm24ad98q.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (47 pp, sha256 f56225fceb6df107, retrieved 2026-10-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF