# CBM1232AS8

**Corebai Microelectronics** · Monitors & Reset Circuits · SOP-8

CBM1232AS8 from Corebai Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PBRST | input | Pushbutton reset input; input low leakage up to -1000 μA at VIL=0 V, and a reset is held for tPDLY of 20 ms with tPB≥20 ms. |
| 2 | TD | input | Watchdog time delay set input: watchdog timeout is 62.5-250 ms with TD=GND, 250-1000 ms when disconnected, and 500-2000 ms with TD=VCC. |
| 3 | TOL | input | Tolerance select input for VCC monitoring: VCC trip point is 4.5-4.74 V with TOL=GND and 4.25-4.49 V with TOL=VCC. |
| 4 | GND | power_in | Ground. |
| 5 | RST | output | Reset output, active high. |
| 6 | /RST | output | Reset output, active low, open-drain. |
| 7 | /ST | input | Strobe (trigger) input for the watchdog timer; input low leakage up to -1 μA at VIL=0 V. |
| 8 | VCC | power_in | Supply voltage, recommended 4.5-5.5 V with absolute maximum 7.0 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Corebai Microelectronics |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC |  |  | 7 | V |  | 3 |
| Input voltage high | VIH |  |  | 7 | V |  | 3 |
| Input voltage low | VIL | -1 |  |  | V |  | 4 |
| Operating temperature | TA | -40 |  | 85 | °C |  | 4 |
| Storage temperature | Tstg | -60 |  | 125 | °C |  | 4 |
| Supply voltage | VCC | 4.5 |  | 5.5 | V |  | 4 |
| Input voltage high | VIH | 2 |  |  | V | max printed as UCC+0.3 | 4 |
| Input voltage low | VIL | -0.3 |  | 0.8 | V |  | 4 |
| Operating temperature | TA | -20 |  | 70 | °C |  | 4 |
| VCC trip point, TOL = GND | VCC TP1 | 4.5 |  | 4.74 | V | TOL = GND | 5 |
| VCC trip point, TOL = VCC | VCC TP2 | 4.25 |  | 4.49 | V | TOL = VCC | 5 |
| Input leakage low (strobe, select) | ILIL1 |  |  | -1 | μA | VCC=5 V±10%, VIL=0 V | 5 |
| Input leakage low (TOL) | ILIL2 |  |  | -300 | μA | VCC=5 V±10%, VIL=0 V | 5 |
| Input leakage low (pushbutton reset) | ILIL3 |  |  | -1000 | μA | VCC=5 V±10%, VIL=0 V | 5 |
| Input leakage high (strobe, select) | ILIH1 |  |  | 1 | μA | VCC=5 V±10%, VIH=VCC | 5 |
| Input leakage high (TD) | ILIH2 |  |  | 300 | μA | VCC=5 V±10%, VIH=VCC | 5 |
| Output current high | IOH | -8 |  |  | μA | VCC=5 V±10%, VOH=2.4 V | 5 |
| Output current low | IOL | 8 |  |  | mA | VCC=5 V±10%, VOL=0.4 V | 5 |
| Output voltage low | VOL |  |  | 0.4 | V | VCC=2 V, IOL=1 mA | 5 |
| Operating current | ICC |  |  | 2 | mA | VCC=5 V±10% | 5 |
| Watchdog timeout, TD = GND | tTD1 | 62.5 |  | 250 | ms | VCC=5.0 V±10%, tST≥20 ns, TD = GND | 6 |
| Watchdog timeout, TD disconnected | tTD2 | 250 |  | 1000 | ms | TD disconnected | 6 |
| Watchdog timeout, TD = VCC | tTD3 | 500 |  | 2000 | ms | TD = VCC | 6 |
| Pushbutton reset delay | tPDLY |  |  | 20 | ms | VCC=5.0 V±10% tPB≥20 ms | 6 |
| Reset active time | tRST | 250 |  | 1000 | ms | VCC=5.0 V±10% tPB≥20 ms | 6 |
| VCC detect to reset delay | tRPD |  |  | 175 | μs | VCC from 5.0 to 4.0 V, tF±10μs | 6 |
| VCC detect reset time | tRPU | 250 |  | 1000 | ms | VCC from 5.0 to 4.0 V, tR≥1μs | 6 |

## CAD (KiCad official)

- Symbol: `CBM1232AS8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cbm1232as8-etched.step` / `cbm1232as8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cbm1232as8.step` / `cbm1232as8.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Corebai Microelectronics datasheet](docs/cbm1232as8-datasheet.pdf) (12 pp, sha256 `84d00363dc5486c7`, retrieved 2026-10-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cbm1232as8-datasheet.pdf)