# CAV25512VE-GT3

**onsemi** · EEPROM · SOIC-8

CAV25512VE-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select input that enables the device; when high SO is tri-stated and the device is in Standby, and each session must start with a high-to-low and end with a low-to-high transition. |
| 2 | SO | tri_state | Serial data output that shifts data out on the falling edge of SCK in SPI modes (0,0) and (1,1) and is high impedance when CS is high or during hold. |
| 3 | WP | input | Write protect input that allows all write operations when high, and disables Status Register writes when low with the WPEN bit set to 1. |
| 4 | VSS | power_in | Ground. |
| 5 | SI | input | Serial data input that accepts op-codes, addresses and data, latched on the rising edge of SCK in SPI modes (0,0) and (1,1). |
| 6 | SCK | input | Serial clock input from the host that synchronizes communication, with a maximum frequency of 10 MHz. |
| 7 | HOLD | input | Hold input that pauses serial transmission when taken low (with SCK low) and resumes when taken high; tie to VCC directly or through a resistor when unused. |
| 8 | VCC | power_in | Power supply, 2.5 V to 5.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature (absolute maximum) |  | -45 |  | 130 | °C |  | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Voltage on any Pin with Respect to Ground |  | -0.5 |  | 6.5 | V | Note 1 | 2 |
| Endurance | NEND | 1e+06 |  |  | Program / Erase Cycles | Page Mode, VCC = 5 V, 25°C | 2 |
| Data Retention | TDR | 100 |  |  | Years |  | 2 |
| Supply Voltage Range | VCC | 2.5 |  | 5.5 | V |  | 1 |
| Operating Temperature Range | TA | -40 |  | 125 | °C |  | 2 |
| Supply Current (Read Mode) | ICCR |  |  | 3 | mA | Read, SO open, fSCK = 10 MHz | 2 |
| Supply Current (Write Mode) | ICCW |  |  | 2 | mA | Write, CS = VCC | 2 |
| Standby Current | ISB1 |  |  | 3 | µA | VIN = GND or VCC, CS = VCC, WP = VCC, HOLD = VCC, VCC = 5.5 V | 2 |
| Standby Current | ISB2 |  |  | 5 | µA | VIN = GND or VCC, CS = VCC, WP = GND, HOLD = GND, VCC = 5.5 V | 2 |
| Input Leakage Current | IL | -2 |  | 2 | µA | VIN = GND or VCC | 2 |
| Output Leakage Current | ILO | -2 |  | 2 | µA | CS = VCC VOUT = GND or VCC | 2 |
| Input Low Voltage (min) | VIL | -0.5 |  |  | V |  | 2 |
| Output Low Voltage | VOL |  |  | 0.4 | V | IOL = 3.0 mA | 2 |
| Output Capacitance (SO) | COUT |  |  | 8 | pF | VOUT = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 |
| Input Capacitance (CS, SCK, SI, WP, HOLD) | CIN |  |  | 8 | pF | VIN = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 |
| Clock Frequency | fSCK |  |  | 10 | MHz |  | 3 |
| Data Setup Time | tSU | 10 |  |  | ns |  | 3 |
| Data Hold Time | tH | 10 |  |  | ns |  | 3 |
| SCK High Time | tWH | 40 |  |  | ns |  | 3 |
| SCK Low Time | tWL | 40 |  |  | ns |  | 3 |
| HOLD to Output Low Z | tLZ |  |  | 25 | ns |  | 3 |
| Input Rise Time | tRI |  |  | 2 | µs | Note 6 | 3 |
| Input Fall Time | tFI |  |  | 2 | µs | Note 6 | 3 |
| HOLD Setup Time | tHD | 0 |  |  | ns |  | 3 |
| HOLD Hold Time | tCD | 10 |  |  | ns |  | 3 |
| Output Valid from Clock Low | tV |  |  | 40 | ns |  | 3 |
| Output Hold Time | tHO | 0 |  |  | ns |  | 3 |
| Output Disable Time | tDIS |  |  | 20 | ns |  | 3 |
| HOLD to Output High Z | tHZ |  |  | 25 | ns |  | 3 |
| CS High Time | tCS | 40 |  |  | ns |  | 3 |
| CS Setup Time | tCSS | 30 |  |  | ns |  | 3 |
| CS Hold Time | tCSH | 30 |  |  | ns |  | 3 |
| CS Inactive Setup Time | tCNS | 30 |  |  | ns |  | 3 |
| CS Inactive Hold Time | tCNH | 30 |  |  | ns |  | 3 |
| WP Setup Time | tWPS | 10 |  |  | ns |  | 3 |
| WP Hold Time | tWPH | 10 |  |  | ns |  | 3 |
| Write Cycle Time | tWC |  |  | 4 | ms | Note 7 | 3 |
| Power-up to Read Operation | tPUR |  |  | 1 | ms | Notes 6, 8 | 3 |
| Power-up to Write Operation | tPUW |  |  | 1 | ms | Notes 6, 8 | 3 |

## CAD (KiCad official)

- Symbol: `CAV25512VE-GT3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `cav25512ve-gt3-etched.step` / `cav25512ve-gt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cav25512ve-gt3.step` / `cav25512ve-gt3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/cav25512ve-gt3-d.pdf) (15 pp, sha256 `fb1a34030b853646`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cav25512ve-gt3-datasheet.pdf)