component
CAV24C256WE-GT3
Public Made by Adomby adom
onsemi EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Publish 0.1.0
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CAV24C256WE-GT3
onsemi · EEPROM · SOIC-8
CAV24C256WE-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 2 | A1 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 3 | A2 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 4 | VSS | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data I/O that receives input data and transmits stored data, open drain in transmit mode. |
| 6 | SCL | input | Serial clock input that accepts the clock signal generated by the master. |
| 7 | WP | input | Write protect input that inhibits all write operations when pulled HIGH, with an on-chip pull-down resistor. |
| 8 | VCC | power_in | Power supply, 2.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Voltage on any Pin with Respect to Ground | -0.5 | 6.5 | V | Note 1 | 2 | ||
| Supply Voltage Range | VCC | 2.5 | 5.5 | V | 1 | ||
| Operating Temperature | TA | -40 | 125 | °C | AEC-Q100 Grade 1 | 1 | |
| Read Current | ICCR | 1 | mA | Read, fSCL = 400 kHz/1 MHz | 2 | ||
| Write Current | ICCW | 3 | mA | 2 | |||
| Standby Current | ISB | 5 | A | All I/O Pins at GND or VCC, TA = -40°C to +125°C | 2 | ||
| I/O Pin Leakage | IL | 2 | A | Pin at GND or VCC, TA = -40°C to +125°C | 2 | ||
| Input Low Voltage | VIL | -0.5 | 0.3 | V | max is 0.3 VCC | 2 | |
| Input High Voltage | VIH | 0.7 | V | min is 0.7 VCC, max VCC + 0.5 | 2 | ||
| Output Low Voltage | VOL | 0.4 | V | IOL = 3.0 mA | 2 | ||
| SDA I/O Pin Capacitance | CIN | 8 | pF | VIN = 0 V | 2 | ||
| Input Capacitance (other pins) | CIN | 6 | pF | VIN = 0 V | 2 | ||
| WP/Address Input Current | IWP, IA | 75 | A | VIN < VIH, VCC = 5.5 V | 2 | ||
| WP/Address Input Current | IWP, IA | 50 | A | VIN < VIH, VCC = 3.3 V | 2 | ||
| WP/Address Input Current | IWP, IA | 2 | A | VIN > VIH | 2 | ||
| Endurance | NEND | 1e+06 | Program/Erase Cycles | Page Mode, VCC = 5 V, 25°C | 2 | ||
| Data Retention | TDR | 100 | Years | 2 | |||
| Clock Frequency (Fast-Plus) | FSCL | 1000 | kHz | Fast-Plus | 3 | ||
| Clock Frequency (Fast) | FSCL | 400 | kHz | Fast | 3 | ||
| Clock Frequency (Standard) | FSCL | 100 | kHz | Standard | 3 | ||
| Write Cycle Time | tWR | 5 | ms | All modes | 3 | ||
| Noise Pulse Filtered at SCL and SDA | Ti | 50 | ns | All modes | 3 | ||
| Data Out Hold Time | tDH | 50 | ns | All modes | 3 | ||
| SCL Low to Data Out Valid (Fast-Plus) | tAA | 0.4 | s | Fast-Plus | 3 | ||
| SDA and SCL Rise Time (Fast-Plus) | tR | 100 | ns | Fast-Plus | 3 | ||
| SDA and SCL Fall Time (Fast-Plus) | tF | 100 | ns | Fast-Plus | 3 | ||
| Data In Setup Time (Fast-Plus) | tSU:DAT | 50 | ns | Fast-Plus | 3 | ||
| Low Period of SCL Clock (Fast-Plus) | tLOW | 0.45 | s | Fast-Plus | 3 | ||
| High Period of SCL Clock (Fast-Plus) | tHIGH | 0.4 | s | Fast-Plus | 3 | ||
| Bus Free Time (Fast-Plus) | tBUF | 0.5 | s | Fast-Plus | 3 |
CAD (KiCad official)
- Symbol:
CAV24C256WE-GT3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
cav24c256we-gt3-etched.step/cav24c256we-gt3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cav24c256we-gt3.step/cav24c256we-gt3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (12 pp, sha256
fe02f8efb285d2b4, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CAV24C256WE-GT3
**onsemi** · EEPROM · SOIC-8
CAV24C256WE-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 2 | A1 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 3 | A2 | input | Device address input that selects one of up to eight devices on the bus, with an on-chip pull-down resistor. |
| 4 | VSS | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data I/O that receives input data and transmits stored data, open drain in transmit mode. |
| 6 | SCL | input | Serial clock input that accepts the clock signal generated by the master. |
| 7 | WP | input | Write protect input that inhibits all write operations when pulled HIGH, with an on-chip pull-down resistor. |
| 8 | VCC | power_in | Power supply, 2.5 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Voltage on any Pin with Respect to Ground | | -0.5 | | 6.5 | V | Note 1 | 2 |
| Supply Voltage Range | VCC | 2.5 | | 5.5 | V | | 1 |
| Operating Temperature | TA | -40 | | 125 | °C | AEC-Q100 Grade 1 | 1 |
| Read Current | ICCR | | | 1 | mA | Read, fSCL = 400 kHz/1 MHz | 2 |
| Write Current | ICCW | | | 3 | mA | | 2 |
| Standby Current | ISB | | | 5 | A | All I/O Pins at GND or VCC, TA = -40°C to +125°C | 2 |
| I/O Pin Leakage | IL | | | 2 | A | Pin at GND or VCC, TA = -40°C to +125°C | 2 |
| Input Low Voltage | VIL | -0.5 | | 0.3 | V | max is 0.3 VCC | 2 |
| Input High Voltage | VIH | 0.7 | | | V | min is 0.7 VCC, max VCC + 0.5 | 2 |
| Output Low Voltage | VOL | | | 0.4 | V | IOL = 3.0 mA | 2 |
| SDA I/O Pin Capacitance | CIN | | | 8 | pF | VIN = 0 V | 2 |
| Input Capacitance (other pins) | CIN | | | 6 | pF | VIN = 0 V | 2 |
| WP/Address Input Current | IWP, IA | | | 75 | A | VIN < VIH, VCC = 5.5 V | 2 |
| WP/Address Input Current | IWP, IA | | | 50 | A | VIN < VIH, VCC = 3.3 V | 2 |
| WP/Address Input Current | IWP, IA | | | 2 | A | VIN > VIH | 2 |
| Endurance | NEND | 1e+06 | | | Program/Erase Cycles | Page Mode, VCC = 5 V, 25°C | 2 |
| Data Retention | TDR | 100 | | | Years | | 2 |
| Clock Frequency (Fast-Plus) | FSCL | | | 1000 | kHz | Fast-Plus | 3 |
| Clock Frequency (Fast) | FSCL | | | 400 | kHz | Fast | 3 |
| Clock Frequency (Standard) | FSCL | | | 100 | kHz | Standard | 3 |
| Write Cycle Time | tWR | | | 5 | ms | All modes | 3 |
| Noise Pulse Filtered at SCL and SDA | Ti | | | 50 | ns | All modes | 3 |
| Data Out Hold Time | tDH | 50 | | | ns | All modes | 3 |
| SCL Low to Data Out Valid (Fast-Plus) | tAA | | | 0.4 | s | Fast-Plus | 3 |
| SDA and SCL Rise Time (Fast-Plus) | tR | | | 100 | ns | Fast-Plus | 3 |
| SDA and SCL Fall Time (Fast-Plus) | tF | | | 100 | ns | Fast-Plus | 3 |
| Data In Setup Time (Fast-Plus) | tSU:DAT | 50 | | | ns | Fast-Plus | 3 |
| Low Period of SCL Clock (Fast-Plus) | tLOW | 0.45 | | | s | Fast-Plus | 3 |
| High Period of SCL Clock (Fast-Plus) | tHIGH | 0.4 | | | s | Fast-Plus | 3 |
| Bus Free Time (Fast-Plus) | tBUF | 0.5 | | | s | Fast-Plus | 3 |
## CAD (KiCad official)
- Symbol: `CAV24C256WE-GT3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `cav24c256we-gt3-etched.step` / `cav24c256we-gt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cav24c256we-gt3.step` / `cav24c256we-gt3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/cav24c256we-gt3-d.pdf) (12 pp, sha256 `fe02f8efb285d2b4`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cav24c256we-gt3-datasheet.pdf)