component
CAT93C66VI-GT3
Public Made by Adomby adom
onsemi EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CAT93C66VI-GT3
onsemi · EEPROM · SOIC-8
CAT93C66VI-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select must be deselected for a minimum of tCSMIN (0.25 µs) after a write, erase, or ERAL/WRAL command, with CS setup time 50 ns and hold time 0 ns. |
| 2 | SK | input | Serial clock input whose rising edge clocks instructions, addresses and write data into DI, with a maximum clock frequency of 2000 kHz (DC) and minimum high and low times of 0.25 µs. |
| 3 | DI | input | Serial data input that samples instructions, addresses and write data on the rising edge of SK, with setup and hold times of 100 ns each. |
| 4 | DO | output | Serial data output that is in high impedance except during read or when polling ready/busy status, with an output capacitance of 5 pF (max) and a tHZ of 100 ns to high-Z. |
| 5 | GND | power_in | Ground reference for the device; the ORG pin must be tied to GND to select the x8 organization. |
| 6 | ORG | input | Memory organization select: connect to VCC for x16 (256 x 16-bit registers), to GND for x8 (512 x 8-bit registers), and if left unconnected an internal pull-up selects x16. |
| 7 | NC | unconnected | No internal connection on this package pin. |
| 8 | VCC | power_in | Single power supply input, operating from 1.8 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Voltage on Any Pin with Respect to Ground | -0.5 | 6.5 | V | 2 | |||
| Endurance | NEND | 1e+06 | Program / Erase Cycles | Block Mode, VCC = 5 V, 25°C | 2 | ||
| Data Retention | TDR | 100 | Years | 2 | |||
| Power Supply Current (Write) | ICC1 | 1 | mA | fSK = 1 MHz, VCC = 5.0 V | 2 | ||
| Power Supply Current (Read) | ICC2 | 500 | µA | fSK = 1 MHz, VCC = 5.0 V | 2 | ||
| Power Supply Current (Standby) (x8 Mode) | ISB1 | 2 | µA | VIN = GND or VCC, CS = GND, ORG = GND, TA = −40°C to +85°C | 2 | ||
| Power Supply Current (Standby) (x16 Mode) | ISB2 | 1 | µA | VIN = GND or VCC, CS = GND, ORG = Float or VCC, TA = −40°C to +85°C | 2 | ||
| Input Leakage Current | ILI | 1 | µA | VIN = GND to VCC, TA = −40°C to +85°C | 2 | ||
| Output Leakage Current | ILO | 1 | µA | VOUT = GND to VCC, CS = GND, TA = −40°C to +85°C | 2 | ||
| Input Low Voltage | VIL1 | -0.1 | 0.8 | V | 4.5 V ≤ VCC < 5.5 V | 2 | |
| Input High Voltage | VIH1 | 2 | V | 4.5 V ≤ VCC < 5.5 V | 2 | ||
| Input Low Voltage | VIL2 | 0 | V | 1.8 V ≤ VCC < 4.5 V | 2 | ||
| Output Low Voltage | VOL1 | 0.4 | V | 4.5 V ≤ VCC < 5.5 V, IOL = 2.1 mA | 2 | ||
| Output High Voltage | VOH1 | 2.4 | V | 4.5 V ≤ VCC < 5.5 V, IOH = −400 µA | 2 | ||
| Output Low Voltage | VOL2 | 0.2 | V | 1.8 V ≤ VCC < 4.5 V, IOL = 1 mA | 2 | ||
| Output Capacitance (DO) | COUT | 5 | pF | VOUT = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 | ||
| Input Capacitance (CS, SK, DI, ORG) | CIN | 5 | pF | VIN = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 | ||
| CS Setup Time | tCSS | 50 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| CS Hold Time | tCSH | 0 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| DI Setup Time | tDIS | 100 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| DI Hold Time | tDIH | 100 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Output Delay to 1 | tPD1 | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Output Delay to 0 | tPD0 | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Output Delay to High-Z | tHZ | 100 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Program/Erase Pulse Width | tEW | 5 | ms | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Minimum CS Low Time | tCSMIN | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Minimum SK High Time | tSKHI | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Minimum SK Low Time | tSKLOW | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Output Delay to Status Valid | tSV | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Maximum Clock Frequency | SKMAX | 2000 | kHz | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 | ||
| Power-up to Read Operation | tPUR | 1 | ms | Delay from time VCC is stable | 3 | ||
| Power-up to Write Operation | tPUW | 1 | ms | Delay from time VCC is stable | 3 | ||
| Supply Voltage (VCC) | VCC | 1.8 | 5.5 | V | Operating range stated in D.C. and A.C. characteristics headers | 2 | |
| Ambient Operating Temperature (Industrial) | TA | -40 | 85 | °C | Industrial temperature range stated in D.C. and A.C. characteristics headers | 2 |
CAD (KiCad official)
- Symbol:
CAT93C66VI-GT3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
cat93c66vi-gt3-etched.step/cat93c66vi-gt3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cat93c66vi-gt3.step/cat93c66vi-gt3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
c06943f5dd77ad14, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CAT93C66VI-GT3
**onsemi** · EEPROM · SOIC-8
CAT93C66VI-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select must be deselected for a minimum of tCSMIN (0.25 µs) after a write, erase, or ERAL/WRAL command, with CS setup time 50 ns and hold time 0 ns. |
| 2 | SK | input | Serial clock input whose rising edge clocks instructions, addresses and write data into DI, with a maximum clock frequency of 2000 kHz (DC) and minimum high and low times of 0.25 µs. |
| 3 | DI | input | Serial data input that samples instructions, addresses and write data on the rising edge of SK, with setup and hold times of 100 ns each. |
| 4 | DO | output | Serial data output that is in high impedance except during read or when polling ready/busy status, with an output capacitance of 5 pF (max) and a tHZ of 100 ns to high-Z. |
| 5 | GND | power_in | Ground reference for the device; the ORG pin must be tied to GND to select the x8 organization. |
| 6 | ORG | input | Memory organization select: connect to VCC for x16 (256 x 16-bit registers), to GND for x8 (512 x 8-bit registers), and if left unconnected an internal pull-up selects x16. |
| 7 | NC | unconnected | No internal connection on this package pin. |
| 8 | VCC | power_in | Single power supply input, operating from 1.8 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Voltage on Any Pin with Respect to Ground | | -0.5 | | 6.5 | V | | 2 |
| Endurance | NEND | 1e+06 | | | Program / Erase Cycles | Block Mode, VCC = 5 V, 25°C | 2 |
| Data Retention | TDR | 100 | | | Years | | 2 |
| Power Supply Current (Write) | ICC1 | | | 1 | mA | fSK = 1 MHz, VCC = 5.0 V | 2 |
| Power Supply Current (Read) | ICC2 | | | 500 | µA | fSK = 1 MHz, VCC = 5.0 V | 2 |
| Power Supply Current (Standby) (x8 Mode) | ISB1 | | | 2 | µA | VIN = GND or VCC, CS = GND, ORG = GND, TA = −40°C to +85°C | 2 |
| Power Supply Current (Standby) (x16 Mode) | ISB2 | | | 1 | µA | VIN = GND or VCC, CS = GND, ORG = Float or VCC, TA = −40°C to +85°C | 2 |
| Input Leakage Current | ILI | | | 1 | µA | VIN = GND to VCC, TA = −40°C to +85°C | 2 |
| Output Leakage Current | ILO | | | 1 | µA | VOUT = GND to VCC, CS = GND, TA = −40°C to +85°C | 2 |
| Input Low Voltage | VIL1 | -0.1 | | 0.8 | V | 4.5 V ≤ VCC < 5.5 V | 2 |
| Input High Voltage | VIH1 | 2 | | | V | 4.5 V ≤ VCC < 5.5 V | 2 |
| Input Low Voltage | VIL2 | 0 | | | V | 1.8 V ≤ VCC < 4.5 V | 2 |
| Output Low Voltage | VOL1 | | | 0.4 | V | 4.5 V ≤ VCC < 5.5 V, IOL = 2.1 mA | 2 |
| Output High Voltage | VOH1 | 2.4 | | | V | 4.5 V ≤ VCC < 5.5 V, IOH = −400 µA | 2 |
| Output Low Voltage | VOL2 | | | 0.2 | V | 1.8 V ≤ VCC < 4.5 V, IOL = 1 mA | 2 |
| Output Capacitance (DO) | COUT | | | 5 | pF | VOUT = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 |
| Input Capacitance (CS, SK, DI, ORG) | CIN | | | 5 | pF | VIN = 0 V, TA = 25°C, f = 1.0 MHz, VCC = +5.0 V | 3 |
| CS Setup Time | tCSS | 50 | | | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| CS Hold Time | tCSH | 0 | | | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| DI Setup Time | tDIS | 100 | | | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| DI Hold Time | tDIH | 100 | | | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Output Delay to 1 | tPD1 | | | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Output Delay to 0 | tPD0 | | | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Output Delay to High-Z | tHZ | | | 100 | ns | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Program/Erase Pulse Width | tEW | | | 5 | ms | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Minimum CS Low Time | tCSMIN | 0.25 | | | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Minimum SK High Time | tSKHI | 0.25 | | | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Minimum SK Low Time | tSKLOW | 0.25 | | | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Output Delay to Status Valid | tSV | | | 0.25 | µs | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Maximum Clock Frequency | SKMAX | | | 2000 | kHz | VCC = +1.8 V to +5.5 V, TA = −40°C to +85°C | 3 |
| Power-up to Read Operation | tPUR | | | 1 | ms | Delay from time VCC is stable | 3 |
| Power-up to Write Operation | tPUW | | | 1 | ms | Delay from time VCC is stable | 3 |
| Supply Voltage (VCC) | VCC | 1.8 | | 5.5 | V | Operating range stated in D.C. and A.C. characteristics headers | 2 |
| Ambient Operating Temperature (Industrial) | TA | -40 | | 85 | °C | Industrial temperature range stated in D.C. and A.C. characteristics headers | 2 |
## CAD (KiCad official)
- Symbol: `CAT93C66VI-GT3`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `cat93c66vi-gt3-etched.step` / `cat93c66vi-gt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cat93c66vi-gt3.step` / `cat93c66vi-gt3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589998753349603328) (9 pp, sha256 `c06943f5dd77ad14`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cat93c66vi-gt3-datasheet.pdf)