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Contents

README

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CAT93C46BVI-GT3

onsemi · EEPROM · SOIC-8

CAT93C46BVI-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input; the device must be deselected for a minimum of tCSMIN after a WRITE, ERASE, ERAL or WRAL instruction so the self-timed cycle can start on the falling edge of CS.
2 SK input Serial clock input; instructions, addresses and write data are clocked into DI on its rising edge, with maximum clock frequency of 2000 kHz for VCC < 3.3 V and 4000 kHz for VCC > 3.3 V.
3 DI input Serial data input that receives the start bit, opcode, address and write data on the rising edge of SK, with DI setup and hold times of 100 ns for VCC < 3.3 V and 50 ns for VCC > 3.3 V.
4 DO output Serial data output that is in a high-impedance state except while reading data or polling the ready/busy status during a write cycle, and returns to high-impedance on the rising edge of SK.
5 GND power_in Ground reference for the device; input voltages must not be lower than −0.5 V with respect to ground under normal operation.
6 ORG input Memory organization select: connect to VCC for x16 (64 × 16-bit registers), to GND for x8 (128 × 8-bit registers), and if left unconnected an internal pullup selects x16.
7 NC unconnected No internal connection on this package pin.
8 VCC power_in Power supply input; the device operates from 1.8 V (1.65 V for the CAT93C46Bxx-xxL option at TA = −20 °C to +85 °C) to 5.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature -65 150 °C 2
Voltage on Any Pin with Respect to Ground -0.5 6.5 V Note 1 2
Endurance NEND 1e+06 Program / Erase Cycles Block Mode, VCC = 5 V, 25°C (Note 3) 2
Data Retention TDR 100 Years 2
Supply Current (Write) ICC1 1 mA Write, VCC = 5.0 V 2
Supply Current (Read) ICC2 500 µA Read, DO open, fSK = 2 MHz, VCC = 5.0 V 2
Standby Current (x8 Mode) ISB1 2 µA VIN = GND or VCC, CS = GND, ORG = GND, TA = −40°C to +85°C 2
Standby Current (x16 Mode) ISB2 1 µA VIN = GND or VCC, CS = GND, ORG = Float or VCC, TA = −40°C to +85°C 2
Input Leakage Current ILI 1 µA VIN = GND to VCC, TA = −40°C to +85°C 2
Output Leakage Current ILO 1 µA VOUT = GND to VCC, CS = GND, TA = −40°C to +85°C 2
Input Low Voltage VIL1 -0.1 0.8 V 4.5 V ≤ VCC < 5.5 V 2
Input High Voltage VIH1 2 V 4.5 V ≤ VCC < 5.5 V 2
Input Low Voltage VIL2 0 V 1.65 V ≤ VCC < 4.5 V 2
Output Low Voltage VOL1 0.4 V 4.5 V ≤ VCC < 5.5 V, IOL = 3 mA 2
Output High Voltage VOH1 2.4 V 4.5 V ≤ VCC < 5.5 V, IOH = −400 µA 2
Output Low Voltage VOL2 0.2 V 1.65 V ≤ VCC < 4.5 V, IOL = 1 mA 2
Output Capacitance (DO) COUT 5 pF VOUT = 0 V; TA = 25°C, f = 1 MHz, VCC = 5 V 2
Input Capacitance (CS, SK, DI, ORG) CIN 5 pF VIN = 0 V; TA = 25°C, f = 1 MHz, VCC = 5 V 2
CS Setup Time tCSS 50 ns VCC < 3.3 V, TA = −40°C to +85°C 3
CS Hold Time tCSH 0 ns VCC < 3.3 V, TA = −40°C to +85°C 3
DI Setup Time tDIS 100 ns VCC < 3.3 V, TA = −40°C to +85°C 3
DI Setup Time tDIS 50 ns VCC > 3.3 V, TA = −40°C to +85°C 3
DI Hold Time tDIH 100 ns VCC < 3.3 V, TA = −40°C to +85°C 3
DI Hold Time tDIH 50 ns VCC > 3.3 V, TA = −40°C to +85°C 3
Output Delay to 1 tPD1 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Output Delay to 1 tPD1 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Output Delay to 0 tPD0 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Output Delay to 0 tPD0 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Output Delay to High-Z tHZ 100 ns VCC < 3.3 V, TA = −40°C to +85°C (Note 5) 3
Program / Erase Cycle Time WRITE, ERASE tEW 3 ms VCC < 3.3 V, TA = −40°C to +85°C 3
Program / Erase Cycle Time WRAL, ERAL tEW 5 ms VCC < 3.3 V, TA = −40°C to +85°C 3
Minimum CS Low Time tCSMIN 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Minimum CS Low Time tCSMIN 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Minimum SK High Time tSKHI 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Minimum SK High Time tSKHI 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Minimum SK Low Time tSKLOW 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Minimum SK Low Time tSKLOW 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Output Delay to Status Valid tSV 0.25 µs VCC < 3.3 V, TA = −40°C to +85°C 3
Output Delay to Status Valid tSV 0.1 µs VCC > 3.3 V, TA = −40°C to +85°C 3
Maximum Clock Frequency SKMAX 2000 kHz VCC < 3.3 V, TA = −40°C to +85°C 3
Maximum Clock Frequency SKMAX 4000 kHz VCC > 3.3 V, TA = −40°C to +85°C 3
Power-up to Read Operation tPUR 0.1 ms 3
Power-up to Write Operation tPUW 0.1 ms 3
Supply Voltage VCC 1.8 5.5 V TA = −40°C to +85°C (industrial, no L suffix) 2
Operating Temperature (Industrial) TA -40 85 °C I = Industrial grade, CAT93C46BVI-GT3 8

CAD (KiCad official)

  • Symbol: CAT93C46BVI-GT3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cat93c46bvi-gt3-etched.step / cat93c46bvi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat93c46bvi-gt3.step / cat93c46bvi-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 9b07686c8bf02552, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF