component
CAT6219-330TDGT3
Public Made by Adomby adom
onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CAT6219-330TDGT3
onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TSOT-23-5
CAT6219-330TDGT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input; operating range 2.3 V to 5.5 V (absolute max 6.5 V), with a 1 µF ceramic capacitor required to ground near the device. |
| 2 | GND | power_in | Ground reference; must be connected to the ground plane on the PCB. |
| 3 | EN | input | Active-high enable input with an internal 2.5 MΩ pull-down resistor so the output is disabled if left open; logic low below 0.4 V, high above 1.8 V. |
| 4 | BYP/ADJ | passive | On this fixed 3.3 V part it is the BYP pin, for an optional 10 nF bypass capacitor to GND that reduces output noise and improves high-frequency PSRR (ADJ on the adjustable version). |
| 5 | VOUT | power_out | LDO regulated output, up to 500 mA, requiring a 2.2 µF ceramic capacitor to ground (4.7 µF for better transient response), with a 250 Ω internal discharge switch. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply input voltage | VIN | 0 | 6.5 | V | 2 | ||
| Enable and output voltage | VEN, VOUT | -0.3 | V | Upper limit printed as VIN + 0.3 V | 2 | ||
| Junction temperature | TJ | 150 | °C | 2 | |||
| Storage temperature range | TS | -65 | 150 | °C | 2 | ||
| Lead temperature (soldering) | 260 | °C | soldering, 5 sec. | 2 | |||
| ESD rating (Human Body Model) | 3 | kV | Human Body Model | 2 | |||
| Input voltage range | VIN | 2.3 | 5.5 | V | 2 | ||
| Enable input voltage | VEN | 0 | V | Upper limit printed as VIN | 2 | ||
| Junction temperature range | TJ | -40 | 125 | °C | 2 | ||
| Package thermal resistance, junction to ambient | θJA | 235 | C/W | SOT23-5 package | 2 | ||
| Output voltage accuracy (initial) | VOUT-ACC | -1 | 1 | % | Initial accuracy for VOUT ≥ 2.0 V (Note 6) | 3 | |
| Output voltage accuracy (second row) | VOUT-ACC | -2 | 2 | % | 3 | ||
| Line regulation | VR-LINE | -0.2 | 0.1 | 0.2 | %/V | VIN = VOUT + 1.0 V to 5.5 V | 3 |
| Line regulation (second row) | VR-LINE | -0.4 | 0.4 | %/V | 3 | ||
| Load regulation | VR-LOAD | 1 | 1.5 | % | IOUT = 100 µA to 500 mA | 3 | |
| Dropout voltage | VDROP | 300 | 400 | mV | IOUT = 500 mA | 3 | |
| Dropout voltage (second row) | VDROP | 500 | mV | 3 | |||
| Ground current | IGND | 55 | 75 | µA | IOUT = 0 A | 3 | |
| Ground current (second row) | IGND | 90 | µA | 3 | |||
| Shutdown ground current | IGND-SD | 1 | µA | VEN < 0.4 V | 3 | ||
| Shutdown ground current (second row) | IGND-SD | 2 | µA | 3 | |||
| Logic high level | VHI | 1.8 | V | VIN = 2.3 to 5.5 V | 3 | ||
| Logic high level (junction range) | VHI | 1.6 | V | VIN = 2.3 to 5.5 V, 0°C to +125°C junction temperature | 3 | ||
| Logic low level | VLO | 0.4 | V | VIN = 2.3 to 5.5 V | 3 | ||
| Enable input current | IEN | 0.15 | 1 | µA | VEN = 0.4 V | 3 | |
| Enable input current (enabled) | IEN | 1.5 | 4 | µA | VEN = VIN | 3 | |
| Adjustable input voltage | VADJ | 1.2 | 1.24 | 1.27 | V | IOUT = 100 µA | 3 |
| COUT equivalent series resistance | ESR | 5 | 500 | mΩ | 3 | ||
| Power supply rejection ratio | PSRR | 64 | dB | f = 1 kHz, CBYP = 10 nF | 3 | ||
| Power supply rejection ratio (20 kHz) | PSRR | 54 | dB | f = 20 kHz, CBYP = 10 nF | 3 | ||
| Output short circuit current limit | ISC | 200 | mA | VOUT = 0 V | 3 | ||
| Turn-on time | TON | 150 | µs | CBYP = 10 nF | 3 | ||
| Output noise voltage | eN | 45 | µVrms | BW = 10 Hz to 100 kHz (Note 5) | 3 | ||
| Shutdown switch resistance | ROUT-SH | 250 | Ω | 3 | |||
| Enable pull-down resistor | REN | 2.5 | MΩ | 3 | |||
| Undervoltage lockout threshold | VUVLO | 2.15 | V | 3 | |||
| Thermal shutdown | TSD | 160 | °C | 3 | |||
| Thermal hysteresis | THYS | 10 | °C | 3 | |||
| Output voltage temperature coefficient | TCOUT | 40 | ppm/°C | 3 | |||
| Ground current at full load | IGND | 85 | µA | IOUT = 500 mA | 3 |
CAD (KiCad official)
- Symbol:
CAT6219-330TDGT3 - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
cat6219-330tdgt3-etched.step/cat6219-330tdgt3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cat6219-330tdgt3.step/cat6219-330tdgt3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (11 pp, sha256
f64d0b369b0b06e6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CAT6219-330TDGT3
**onsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TSOT-23-5
CAT6219-330TDGT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input; operating range 2.3 V to 5.5 V (absolute max 6.5 V), with a 1 µF ceramic capacitor required to ground near the device. |
| 2 | GND | power_in | Ground reference; must be connected to the ground plane on the PCB. |
| 3 | EN | input | Active-high enable input with an internal 2.5 MΩ pull-down resistor so the output is disabled if left open; logic low below 0.4 V, high above 1.8 V. |
| 4 | BYP/ADJ | passive | On this fixed 3.3 V part it is the BYP pin, for an optional 10 nF bypass capacitor to GND that reduces output noise and improves high-frequency PSRR (ADJ on the adjustable version). |
| 5 | VOUT | power_out | LDO regulated output, up to 500 mA, requiring a 2.2 µF ceramic capacitor to ground (4.7 µF for better transient response), with a 250 Ω internal discharge switch. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply input voltage | VIN | 0 | | 6.5 | V | | 2 |
| Enable and output voltage | VEN, VOUT | -0.3 | | | V | Upper limit printed as VIN + 0.3 V | 2 |
| Junction temperature | TJ | | | 150 | °C | | 2 |
| Storage temperature range | TS | -65 | | 150 | °C | | 2 |
| Lead temperature (soldering) | | | | 260 | °C | soldering, 5 sec. | 2 |
| ESD rating (Human Body Model) | | | 3 | | kV | Human Body Model | 2 |
| Input voltage range | VIN | 2.3 | | 5.5 | V | | 2 |
| Enable input voltage | VEN | 0 | | | V | Upper limit printed as VIN | 2 |
| Junction temperature range | TJ | -40 | | 125 | °C | | 2 |
| Package thermal resistance, junction to ambient | θJA | | 235 | | C/W | SOT23-5 package | 2 |
| Output voltage accuracy (initial) | VOUT-ACC | -1 | | 1 | % | Initial accuracy for VOUT ≥ 2.0 V (Note 6) | 3 |
| Output voltage accuracy (second row) | VOUT-ACC | -2 | | 2 | % | | 3 |
| Line regulation | VR-LINE | -0.2 | 0.1 | 0.2 | %/V | VIN = VOUT + 1.0 V to 5.5 V | 3 |
| Line regulation (second row) | VR-LINE | -0.4 | | 0.4 | %/V | | 3 |
| Load regulation | VR-LOAD | | 1 | 1.5 | % | IOUT = 100 µA to 500 mA | 3 |
| Dropout voltage | VDROP | | 300 | 400 | mV | IOUT = 500 mA | 3 |
| Dropout voltage (second row) | VDROP | | | 500 | mV | | 3 |
| Ground current | IGND | | 55 | 75 | µA | IOUT = 0 A | 3 |
| Ground current (second row) | IGND | | | 90 | µA | | 3 |
| Shutdown ground current | IGND-SD | | | 1 | µA | VEN < 0.4 V | 3 |
| Shutdown ground current (second row) | IGND-SD | | | 2 | µA | | 3 |
| Logic high level | VHI | 1.8 | | | V | VIN = 2.3 to 5.5 V | 3 |
| Logic high level (junction range) | VHI | 1.6 | | | V | VIN = 2.3 to 5.5 V, 0°C to +125°C junction temperature | 3 |
| Logic low level | VLO | | | 0.4 | V | VIN = 2.3 to 5.5 V | 3 |
| Enable input current | IEN | | 0.15 | 1 | µA | VEN = 0.4 V | 3 |
| Enable input current (enabled) | IEN | | 1.5 | 4 | µA | VEN = VIN | 3 |
| Adjustable input voltage | VADJ | 1.2 | 1.24 | 1.27 | V | IOUT = 100 µA | 3 |
| COUT equivalent series resistance | ESR | 5 | | 500 | mΩ | | 3 |
| Power supply rejection ratio | PSRR | | 64 | | dB | f = 1 kHz, CBYP = 10 nF | 3 |
| Power supply rejection ratio (20 kHz) | PSRR | | 54 | | dB | f = 20 kHz, CBYP = 10 nF | 3 |
| Output short circuit current limit | ISC | | 200 | | mA | VOUT = 0 V | 3 |
| Turn-on time | TON | | 150 | | µs | CBYP = 10 nF | 3 |
| Output noise voltage | eN | | 45 | | µVrms | BW = 10 Hz to 100 kHz (Note 5) | 3 |
| Shutdown switch resistance | ROUT-SH | | 250 | | Ω | | 3 |
| Enable pull-down resistor | REN | | 2.5 | | MΩ | | 3 |
| Undervoltage lockout threshold | VUVLO | | 2.15 | | V | | 3 |
| Thermal shutdown | TSD | | 160 | | °C | | 3 |
| Thermal hysteresis | THYS | | 10 | | °C | | 3 |
| Output voltage temperature coefficient | TCOUT | | 40 | | ppm/°C | | 3 |
| Ground current at full load | IGND | | 85 | | µA | IOUT = 500 mA | 3 |
## CAD (KiCad official)
- Symbol: `CAT6219-330TDGT3`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-5`
- 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `cat6219-330tdgt3-etched.step` / `cat6219-330tdgt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cat6219-330tdgt3.step` / `cat6219-330tdgt3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883578461556736) (11 pp, sha256 `f64d0b369b0b06e6`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cat6219-330tdgt3-datasheet.pdf)