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CAT4109V-GT2

onsemi · LED Drivers · SOIC-16

CAT4109V-GT2 from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGND power_in Power ground reference pin that must be connected to the GND pin and to the PCB ground plane.
2 GND power_in Ground reference pin for the entire device that must be connected to the PCB ground plane, and RSET resistors should be connected directly to it.
3 PWM3 input PWM control input for LED3 that must be driven high or low and never left open; logic high requires at least 0.7 x VDD and logic low at most 0.3 x VDD.
4 PWM2 input PWM control input for LED2 that must be driven high or low and never left open; logic high requires at least 0.7 x VDD and logic low at most 0.3 x VDD.
5 PWM1 input PWM control input for LED1 that must be driven high or low and never left open; logic high requires at least 0.7 x VDD and logic low at most 0.3 x VDD.
6 RSET3 passive LED3 current-set pin regulated at 1.2 V (1.17 V to 1.23 V), whose current is mirrored to LED3 with a gain of 400.
7 RSET2 passive LED2 current-set pin regulated at 1.2 V (1.17 V to 1.23 V), whose current is mirrored to LED2 with a gain of 400.
8 RSET1 passive LED1 current-set pin regulated at 1.2 V (1.17 V to 1.23 V), whose current is mirrored to LED1 with a gain of 400.
9 LED3 output LED channel 3 current-sink cathode terminal that requires more than 0.4 V on the pin for correct operation and withstands up to 25 V.
10 LED2 output LED channel 2 current-sink cathode terminal that requires more than 0.4 V on the pin for correct operation and withstands up to 25 V.
11 LED1 output LED channel 1 current-sink cathode terminal that requires more than 0.4 V on the pin for correct operation and withstands up to 25 V.
12 NC unconnected Not connected inside the package.
13 NC unconnected Not connected inside the package.
14 NC unconnected Not connected inside the package.
15 OE input Output enable input that turns all LED channels off when low; holding it low longer than tPWRDWN (4 ms typical, 8 ms maximum) enters shutdown, with logic high at least 1.3 V and logic low at most 0.4 V.
16 VDD power_in Positive supply pin for the entire device, operated from 3.0 V to 5.5 V, with a small bypass ceramic capacitor recommended near the device.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category LED Drivers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Voltage VDD 6 V 2
Input Voltage Range (OE, PWM1, PWM2, PWM3) -0.3 6 V 2
LED1, LED2, LED3 Voltage 25 V 2
DC Output Current on LED1 to LED3 200 mA 2
Storage Temperature Range -55 160 °C 2
Junction Temperature Range -40 150 °C 2
Lead Soldering Temperature 300 °C 10 sec. 2
ESD Human Body Model, LV pins (non LEDn pins 3, 4, 5, 6, 7, 8, 15, 16) 1500 V JESD22-A114C 2
ESD Human Body Model, HV pins (LEDn pins 9, 10, 11) 500 V JESD22-A114C 2
ESD Machine Model, LV pins (non LEDn pins 3, 4, 5, 6, 7, 8, 15, 16) 200 V JESD625-A 2
ESD Machine Model, HV pins (LEDn pins 9, 10, 11) 175 V JESD625-A 2
ESD Charged Device Model 1000 V JESD22-C101E 2
VDD Voltage (recommended operating) VDD 3 5.5 V 2
Voltage applied to LED1 to LED3 25 V outputs off 2
Voltage applied to LED1 to LED3 6 V outputs on (Note 5) 2
Output Current on LED1 to LED3 2 175 mA 2
Ambient Temperature Range TAMB -40 85 °C CAT4109 grade 2
Supply Current, Outputs Off IDD1 2 5 mA VLED = 5 V, RSET = 24.9 k 3
Supply Current, Outputs Off IDD2 4 10 mA VLED = 5 V, RSET = 5.23 k 3
Supply Current, Outputs On IDD3 2 5 mA VLED = 0.5 V, RSET = 24.9 k 3
Supply Current, Outputs On IDD4 4 10 mA VLED = 0.5 V, RSET = 5.23 k 3
Shutdown Current ISHDN 1 µA VOE = 0 V 3
LED Output Leakage ILKG -1 1 µA VLED = 5 V, Outputs Off 3
Logic Input Leakage Current (PWMx) IIL -5 0 5 µA VPWMx = VDD or GND 3
OE Pull-down Resistance ROE 140 190 250 kΩ 3
OE Logic High Level VOE_IH 1.3 V 3
OE Logic Low Level VOE_IL 0.4 V 3
RSETx Regulated Voltage VRSETx 1.17 1.2 1.23 V 3
Undervoltage Lockout (UVLO) Threshold VUVLO 1.8 V 3
RSET to LED Current Gain Ratio ILED/IRSET 400 100 mA LED Current 3
Thermal Shutdown TSD 150 °C 3
Thermal Hysteresis THYS 20 °C 3
Turn-On time, OE rising to ILED from Shutdown tPS 1.4 µs ILED = 100 mA 3
Turn-On time, OE or PWMx rising to ILED tP1 600 ns ILED = 100 mA 3
Turn-Off time, OE or PWMx falling to ILED tP2 300 ns ILED = 100 mA 3
LED rise time tR 300 ns ILED = 100 mA 3
LED fall time tF 300 ns ILED = 100 mA 3
OE low time tLO 1 µs 3
OE high time tHI 5 µs 3
OE low time to shutdown delay tPWRDWN 4 8 ms 3
Junction-to-ambient thermal resistance θJA 74 °C/W double-sided PCB with two square inches of copper for heat spreading 9

CAD (KiCad official)

  • Symbol: CAT4109V-GT2
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cat4109v-gt2-etched.step / cat4109v-gt2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat4109v-gt2.step / cat4109v-gt2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 cb1d9ae343288edf, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF