component

CAT24C512WI-GT3

Public Made by Adom

by adom

onsemi EEPROM, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cat24c512wi-gt3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cat24c512wi-gt3-etched.fit.json cat24c512wi-gt3: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cat24c512wi-gt3-etched.glb cat24c512wi-gt3: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
cat24c512wi-gt3-etched.step cat24c512wi-gt3: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
cat24c512wi-gt3.glb Publish 0.1.0 · Ray
cat24c512wi-gt3.kicad_mod Publish 0.1.0 · Ray
cat24c512wi-gt3.kicad_sym Publish 0.1.0 · Ray
cat24c512wi-gt3.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cat24c512wi-gt3.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cat24c512wi-gt3: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
README.md cat24c512wi-gt3: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CAT24C512WI-GT3

onsemi · EEPROM · SOIC-8

CAT24C512WI-GT3 from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Combined with A1 and A2 to select one of eight devices on the same I2C bus. Internally pulled down to GND; drive HIGH to set the address bit. Input current up to 75 uA at VCC = 5.5 V.
2 A1 input Device address input bit 1. Combined with A0 and A2 to select one of eight devices on the same I2C bus. Internally pulled down to GND.
3 A2 input Device address input bit 2. Combined with A0 and A1 to select one of eight devices on the same I2C bus. Internally pulled down to GND.
4 VSS power_in Ground reference for the device.
5 SDA bidirectional I2C Serial Data I/O pin. Open-drain output; requires an external pull-up resistor to VCC. Data is acquired on the rising edge of SCL and delivered on the falling edge. Pin capacitance up to 8 pF.
6 SCL input I2C Serial Clock input generated by the bus master. Supports Standard (100 kHz), Fast (400 kHz) and Fast-Plus (1 MHz) modes. Schmitt-trigger input with noise suppression filter.
7 WP input Write Protect input. When held HIGH, all write operations to the memory array are inhibited (hardware write protection for the entire memory). Internally pulled down to GND; leave floating or tie LOW to permit writes.
8 VCC power_in Positive supply voltage input. Operating range 1.8 V to 5.5 V. Absolute maximum 6.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • CAT24C512WI-GT3
  • CAT24C512WI-GT3WI-T3
  • CAT24C512WI-GT3XI-GT3
  • CAT24C512WI-GT3XI-T3
  • CAT24C512WI-GT3LI
  • CAT24C512WI-GT3YI-GT3
  • CAT24C512WI-GT3YI-T3
  • CAT24C512WI-GT3ZI-GT3
  • CAT24C512WI-GT3HU5I-GT3
  • CAT24C512WI-GT3C8A

CAD (KiCad official)

  • Symbol: CAT24C512WI-GT3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: cat24c512wi-gt3-etched.step / cat24c512wi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat24c512wi-gt3.step / cat24c512wi-gt3.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cat24c512wi-gt3.step 122 KB You want the bare part, or you mark your own boards.
cat24c512wi-gt3-etched.step 2.6 MB You want the part with CAT24C512WI-GT3 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 642 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 174dee97153cad86, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF