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Contents

README

markdown

CAT24C16YI-GT3

onsemi · EEPROM · TSSOP-8

CAT24C16YI-GT3 from onsemi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect on the CAT24C16, since the A0 address input is not used on this density.
2 NC unconnected No connect on the CAT24C16, since the A1 address input is not used on this density.
3 NC unconnected No connect on the CAT24C16, since the A2 address input is not used on this density.
4 VSS power_in Ground.
5 SDA bidirectional Serial data input/output that is open drain when transmitting; data is acquired on the positive edge and delivered on the negative edge of SCL.
6 SCL input Serial clock input that accepts the clock generated by the I2C master, supporting 100 kHz Standard and 400 kHz Fast modes.
7 WP input Write protect input that inhibits all write operations when pulled HIGH and is pulled LOW internally when not driven.
8 VCC power_in Power supply, 1.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature -65 150 °C 3
Voltage on any pin with respect to Ground -0.5 6.5 V Note 1 3
Supply Voltage Range VCC 1.7 5.5 V Supply voltage range (Features) 1
Operating Temperature Range (Industrial) TA -40 85 °C Industrial range (Note 9) 23
Read Current ICCR 1 mA Read, fSCL = 400 kHz 3
Write Current ICCW 2 mA Write, fSCL = 400 kHz 3
Standby Current ISB 1 µA All I/O Pins at GND or VCC; TA = −40°C to +85°C; VCC ≤ 3.3 V 3
Standby Current ISB 3 µA All I/O Pins at GND or VCC; TA = −40°C to +85°C; VCC > 3.3 V 3
I/O Pin Leakage IL 2 µA Pin at GND or VCC 3
Input Low Voltage VIL -0.5 V 3
Input High Voltage, SCL and SDA VIH 5.5 V SCL and SDA 3
Output Low Voltage VOL 0.4 V VCC > 2.5 V, IOL = 3 mA 3
Output Low Voltage VOL 0.2 V VCC < 2.5 V, IOL = 1 mA 3
SDA Pin Capacitance CIN 8 pF VIN = 0 V, f = 1.0 MHz, VCC = 5.0 V 4
Other Pins Capacitance CIN 6 pF 4
WP Input Current IWP 130 µA VIN < VIH, VCC = 5.5 V 4
WP Input Current IWP 120 µA VIN < VIH, VCC = 3.3 V 4
WP Input Current IWP 80 µA VIN < VIH, VCC = 1.7 V 4
WP Input Current IWP 2 µA VIN > VIH 4
Address Input Current (A0, A1, A2) IA 50 µA VIN < VIH, VCC = 5.5 V 4
Address Input Current (A0, A1, A2) IA 35 µA VIN < VIH, VCC = 3.3 V 4
Address Input Current (A0, A1, A2) IA 25 µA VIN < VIH, VCC = 1.7 V 4
Address Input Current (A0, A1, A2) IA 2 µA VIN > VIH 4
Clock Frequency FSCL 100 kHz Standard mode 4
Clock Frequency FSCL 400 kHz Fast mode 4
START Condition Hold Time tHD:STA 4 µs Standard mode 4
START Condition Hold Time tHD:STA 0.6 µs Fast mode 4
Low Period of SCL Clock tLOW 4.7 µs Standard mode 4
Low Period of SCL Clock tLOW 1.3 µs Fast mode 4
High Period of SCL Clock tHIGH 4 µs Standard mode 4
High Period of SCL Clock tHIGH 0.6 µs Fast mode 4
START Condition Setup Time tSU:STA 4.7 µs Standard mode 4
START Condition Setup Time tSU:STA 0.6 µs Fast mode 4
Data In Hold Time tHD:DAT 0 µs Standard mode 4
Data In Setup Time tSU:DAT 250 ns Standard mode 4
Data In Setup Time tSU:DAT 100 ns Fast mode 4
SDA and SCL Rise Time tR 1000 ns Standard mode 4
SDA and SCL Rise Time tR 300 ns Fast mode 4
SDA and SCL Fall Time tF 300 ns Standard mode (Note 6) 4
STOP Condition Setup Time tSU:STO 4 µs Standard mode 4
STOP Condition Setup Time tSU:STO 0.6 µs Fast mode 4
Bus Free Time Between STOP and START tBUF 4.7 µs Standard mode 4
Bus Free Time Between STOP and START tBUF 1.3 µs Fast mode 4
SCL Low to Data Out Valid tAA 3.5 µs Standard mode 4
SCL Low to Data Out Valid tAA 0.9 µs Fast mode 4
Data Out Hold Time tDH 100 ns Standard mode 4
Noise Pulse Filtered at SCL and SDA Inputs Ti 100 ns Standard mode (Note 6) 4
WP Setup Time tSU:WP 0 µs Standard mode 4
WP Hold Time tHD:WP 2.5 µs Standard mode 4
Write Cycle Time tWR 5 ms 4
Power-up to Ready Mode tPU 1 ms Notes 7, 8 4
Endurance NEND 1e+06 Program / Erase Cycles Page Mode, VCC = 5 V, 25°C (Note 3) 3
Data Retention TDR 100 Years 3

CAD (KiCad official)

  • Symbol: CAT24C16YI-GT3
  • Footprint: Package_SO:TSSOP-8_4.4x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cat24c16yi-gt3-etched.step / cat24c16yi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat24c16yi-gt3.step / cat24c16yi-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (23 pp, sha256 589fbd8df572cac4, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF