main
Ray Publish 0.1.0 ca32df7

CAT24C16TDI-GT3

onsemi · EEPROM · TSOT-23-5

CAT24C16TDI-GT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCL input The Serial Clock input accepts the serial clock generated by the master, and the I2C bus inputs have Schmitt triggers and noise suppression filters (100 ns noise pulse filtered).
2 VSS power_in Ground reference for the device.
3 SDA bidirectional The Serial Data I/O receives input data and transmits stored data, is open drain in transmit mode, and data is acquired on the positive SCL edge and delivered on the negative SCL edge.
4 WP input The Write Protect input inhibits all write operations when pulled HIGH (VIH min 0.7 x VCC, max VCC + 0.5 V) and is pulled LOW internally when not driven.
5 VCC power_in Power supply, 1.7 V to 5.5 V supply voltage range for the device.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSOT-23-5
Category Memory
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Endurance NEND 1e+06 Program / Erase Cycles Page Mode, VCC = 5 V, 25°C (Note 3) 3
Data Retention TDR 100 Years 3
Voltage on any pin with respect to Ground -0.5 6.5 V With respect to Ground (Note 1) 3
Storage Temperature -65 150 °C 3
Supply Voltage VCC 1.7 5.5 V TA = −40°C to +85°C (Industrial) 3
Ambient Operating Temperature TA -40 85 °C Industrial temperature range (Note 9) 18
Read Current ICCR 1 mA Read, fSCL = 400 kHz 3
Write Current ICCW 2 mA Write, fSCL = 400 kHz 3
Standby Current ISB 1 µA All I/O Pins at GND or VCC; TA = −40°C to +85°C; VCC ≤ 3.3 V 3
Standby Current ISB 3 µA All I/O Pins at GND or VCC; TA = −40°C to +85°C; VCC > 3.3 V 3
I/O Pin Leakage IL 2 µA Pin at GND or VCC 3
Input Low Voltage VIL -0.5 V 3
Input High Voltage VIH 5.5 V SCL and SDA 3
Output Low Voltage VOL 0.4 V VCC > 2.5 V, IOL = 3 mA 3
Output Low Voltage VOL 0.2 V VCC < 2.5 V, IOL = 1 mA 3
SDA Pin Capacitance CIN 8 pF VIN = 0 V, f = 1.0 MHz, VCC = 5.0 V 4
Other Pins Capacitance CIN 6 pF VIN = 0 V, f = 1.0 MHz, VCC = 5.0 V 4
WP Input Current IWP 130 µA VIN < VIH, VCC = 5.5 V 4
WP Input Current IWP 120 µA VIN < VIH, VCC = 3.3 V 4
WP Input Current IWP 80 µA VIN < VIH, VCC = 1.7 V 4
WP Input Current IWP 2 µA VIN > VIH 4
Address Input Current (A0, A1, A2) IA 50 µA Product Rev K; VIN < VIH, VCC = 5.5 V 4
Address Input Current (A0, A1, A2) IA 35 µA Product Rev K; VIN < VIH, VCC = 3.3 V 4
Address Input Current (A0, A1, A2) IA 25 µA Product Rev K; VIN < VIH, VCC = 1.7 V 4
Address Input Current (A0, A1, A2) IA 2 µA Product Rev K; VIN > VIH 4
Clock Frequency FSCL 100 kHz Standard mode 4
Clock Frequency FSCL 400 kHz Fast mode 4
START Condition Hold Time tHD:STA 4 µs Standard mode 4
START Condition Hold Time tHD:STA 0.6 µs Fast mode 4
Low Period of SCL Clock tLOW 4.7 µs Standard mode 4
Low Period of SCL Clock tLOW 1.3 µs Fast mode 4
High Period of SCL Clock tHIGH 4 µs Standard mode 4
High Period of SCL Clock tHIGH 0.6 µs Fast mode 4
START Condition Setup Time tSU:STA 4.7 µs Standard mode 4
START Condition Setup Time tSU:STA 0.6 µs Fast mode 4
Data In Hold Time tHD:DAT 0 µs Standard mode 4
Data In Setup Time tSU:DAT 250 ns Standard mode 4
Data In Setup Time tSU:DAT 100 ns Fast mode 4
SDA and SCL Rise Time tR 1000 ns Standard mode 4
SDA and SCL Rise Time tR 300 ns Fast mode 4
SDA and SCL Fall Time tF 300 ns Standard mode (Note 6) 4
STOP Condition Setup Time tSU:STO 4 µs Standard mode 4
STOP Condition Setup Time tSU:STO 0.6 µs Fast mode 4
Bus Free Time Between STOP and START tBUF 4.7 µs Standard mode 4
Bus Free Time Between STOP and START tBUF 1.3 µs Fast mode 4
SCL Low to Data Out Valid tAA 3.5 µs Standard mode 4
SCL Low to Data Out Valid tAA 0.9 µs Fast mode 4
Data Out Hold Time tDH 100 ns Standard mode 4
Noise Pulse Filtered at SCL and SDA Inputs Ti 100 ns Standard mode (Note 6) 4
WP Setup Time tSU:WP 0 µs Standard mode 4
WP Hold Time tHD:WP 2.5 µs Standard mode 4
Write Cycle Time tWR 5 ms 4
Power-up to Ready Mode tPU 1 ms Notes 7, 8 4

CAD (KiCad official)

  • Symbol: CAT24C16TDI-GT3
  • Footprint: Package_TO_SOT_SMD:TSOT-23-5
  • 3D model: TSOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: cat24c16tdi-gt3-etched.step / cat24c16tdi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat24c16tdi-gt3.step / cat24c16tdi-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (19 pp, sha256 9ef3f3467f1dcd4a, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF