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Ray Publish 0.1.0 aeca850 1d ago

CAT24C08YI-GT3

onsemi · EEPROM · TSSOP-8

CAT24C08YI-GT3 from onsemi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect on the CAT24C08 (this position is A0 on the CAT24C02).
2 NC unconnected No connect on the CAT24C08 (this position is A1 on the CAT24C04 and CAT24C02).
3 A2 input Device address input that sets the device address when cascading multiple devices (up to two CAT24C08) and must match the A2 bit in the slave address; pulled LOW internally when not driven.
4 VSS power_in Ground.
5 SDA bidirectional Serial data input/output that receives input data and transmits EEPROM data; open drain in transmit mode, data acquired on the positive SCL edge and delivered on the negative edge.
6 SCL input Serial clock input that accepts the serial clock generated by the master (100 kHz Standard, 400 kHz Fast).
7 WP input Write protect input that inhibits all write operations to the entire memory when pulled HIGH; pulled LOW internally when not driven.
8 VCC power_in Power supply, 1.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature -65 150 °C 3
Voltage on any pin with respect to Ground -0.5 6.5 V 3
Supply voltage VCC 1.7 5.5 V TA = −40°C to +85°C 3
Ambient operating temperature (Industrial) TA -40 85 °C Industrial range (Note 9) 10
Read Current ICCR 1 mA Read, fSCL = 400 kHz 3
Write Current ICCW 2 mA Write, fSCL = 400 kHz 3
Standby Current ISB 1 uA All I/O Pins at GND or VCC, TA = −40°C to +85°C, VCC ≤ 3.3 V 3
Standby Current ISB 3 uA All I/O Pins at GND or VCC, TA = −40°C to +85°C, VCC > 3.3 V 3
I/O Pin Leakage IL 2 uA Pin at GND or VCC 3
Input Low Voltage VIL -0.5 V 3
Input High Voltage (SCL and SDA) VIH 5.5 V 3
Output Low Voltage VOL 0.4 V VCC > 2.5 V, IOL = 3 mA 3
Output Low Voltage VOL 0.2 V VCC < 2.5 V, IOL = 1 mA 3
SDA Pin Capacitance CIN 8 pF VIN = 0 V, f = 1.0 MHz, VCC = 5.0 V 4
Other Pins Capacitance CIN 6 pF 4
WP Input Current IWP 130 uA VIN < VIH, VCC = 5.5 V 4
WP Input Current IWP 120 uA VIN < VIH, VCC = 3.3 V 4
WP Input Current IWP 80 uA VIN < VIH, VCC = 1.7 V 4
WP Input Current IWP 2 uA VIN > VIH 4
Address Input Current (A0, A1, A2) IA 50 uA VIN < VIH, VCC = 5.5 V 4
Address Input Current (A0, A1, A2) IA 35 uA VIN < VIH, VCC = 3.3 V 4
Address Input Current (A0, A1, A2) IA 25 uA VIN < VIH, VCC = 1.7 V 4
Address Input Current (A0, A1, A2) IA 2 uA VIN > VIH 4
Clock Frequency FSCL 100 kHz Standard mode (100 kHz) 4
Clock Frequency FSCL 400 kHz Fast mode (400 kHz) 4
START Condition Hold Time tHD:STA 4 us Standard mode (100 kHz) 4
START Condition Hold Time tHD:STA 0.6 us Fast mode (400 kHz) 4
Low Period of SCL Clock tLOW 4.7 us Standard mode (100 kHz) 4
Low Period of SCL Clock tLOW 1.3 us Fast mode (400 kHz) 4
High Period of SCL Clock tHIGH 4 us Standard mode (100 kHz) 4
High Period of SCL Clock tHIGH 0.6 us Fast mode (400 kHz) 4
START Condition Setup Time tSU:STA 4.7 us Standard mode (100 kHz) 4
START Condition Setup Time tSU:STA 0.6 us Fast mode (400 kHz) 4
Data In Hold Time tHD:DAT 0 us Standard mode (100 kHz) 4
Data In Setup Time tSU:DAT 250 ns Standard mode (100 kHz) 4
Data In Setup Time tSU:DAT 100 ns Fast mode (400 kHz) 4
SDA and SCL Rise Time tR 1000 ns Standard mode (100 kHz) 4
SDA and SCL Rise Time tR 300 ns Fast mode (400 kHz) 4
SDA and SCL Fall Time tF 300 ns Standard mode (100 kHz) 4
STOP Condition Setup Time tSU:STO 4 us Standard mode (100 kHz) 4
STOP Condition Setup Time tSU:STO 0.6 us Fast mode (400 kHz) 4
Bus Free Time Between STOP and START tBUF 4.7 us Standard mode (100 kHz) 4
Bus Free Time Between STOP and START tBUF 1.3 us Fast mode (400 kHz) 4
SCL Low to Data Out Valid tAA 3.5 us Standard mode (100 kHz) 4
SCL Low to Data Out Valid tAA 0.9 us Fast mode (400 kHz) 4
Data Out Hold Time tDH 100 ns Standard mode (100 kHz) 4
Noise Pulse Filtered at SCL and SDA Inputs Ti 100 ns Standard mode (100 kHz) 4
WP Setup Time tSU:WP 0 us Standard mode (100 kHz) 4
WP Hold Time tHD:WP 2.5 us Standard mode (100 kHz) 4
Write Cycle Time tWR 5 ms Standard mode (100 kHz) 4
Power-up to Ready Mode tPU 1 ms Standard mode (100 kHz) 4

CAD (KiCad official)

  • Symbol: CAT24C08YI-GT3
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cat24c08yi-gt3-etched.step / cat24c08yi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat24c08yi-gt3.step / cat24c08yi-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 ee973dbc065d4e9c, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF