component
CAT24AA01TDI-GT3
Public Made by Adomby adom
onsemi EEPROM, TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
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CAT24AA01TDI-GT3
onsemi · EEPROM · TSOT-23-5
CAT24AA01TDI-GT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | input | The Serial Clock input accepts the clock signal generated by the Master and is used to clock data on SDA. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | SDA | bidirectional | The Serial Data I/O accepts input and delivers output data, is open drain in transmit mode, and data is acquired on the positive edge and delivered on the negative edge of SCL. |
| 4 | WP | input | When forced HIGH by an external source all write operations are inhibited, and when not driven it is pulled LOW internally. |
| 5 | VCC | power_in | Power supply, operating from 1.7 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOT-23-5 |
| Category | Memory |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Voltage on any Pin with Respect to Ground | -0.5 | 6.5 | V | 2 | |||
| Endurance | NEND | 1e+06 | Program/Erase Cycles | Page Mode @ 25°C | 2 | ||
| Data Retention | TDR | 100 | Years | 2 | |||
| Read Current | ICCR | 0.5 | mA | Read, fSCL = 400 kHz | 2 | ||
| Write Current | ICCW | 1 | mA | Write | 2 | ||
| Standby Current | ISB | 1 | µA | All I/O Pins at GND or VCC | 2 | ||
| I/O Pin Leakage | IL | 1 | µA | Pin at GND or VCC | 2 | ||
| Input Low Voltage | VIL | -0.5 | V | 2 | |||
| Output Low Voltage | VOL1 | 0.4 | V | VCC ≥ 2.5 V, IOL = 3.0 mA | 2 | ||
| Output Low Voltage | VOL2 | 0.2 | V | VCC < 2.5 V, IOL = 1.0 mA | 2 | ||
| SDA I/O Pin Capacitance | CIN | 8 | pF | VIN = 0 V | 2 | ||
| Input Capacitance (other pins) | CIN | 6 | pF | VIN = 0 V | 2 | ||
| WP Input Current | IWP | 100 | µA | VIN < VIH | 2 | ||
| WP Input Current | IWP | 1 | µA | VIN > VIH | 2 | ||
| Clock Frequency | FSCL | 100 | kHz | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Clock Frequency | FSCL | 400 | kHz | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| Clock Frequency | FSCL | 1000 | kHz | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| START Condition Hold Time | tHD:STA | 4 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| START Condition Hold Time | tHD:STA | 0.6 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| START Condition Hold Time | tHD:STA | 0.25 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| Low Period of SCL Clock | tLOW | 4.7 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Low Period of SCL Clock | tLOW | 1.3 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| Low Period of SCL Clock | tLOW | 0.5 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| High Period of SCL Clock | tHIGH | 4 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| High Period of SCL Clock | tHIGH | 0.6 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| High Period of SCL Clock | tHIGH | 0.5 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| START Condition Setup Time | tSU:STA | 4.7 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| START Condition Setup Time | tSU:STA | 0.6 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| START Condition Setup Time | tSU:STA | 0.25 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| Data In Setup Time | tSU:DAT | 250 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Data In Setup Time | tSU:DAT | 100 | ns | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| SDA and SCL Rise Time | tR | 1000 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| SDA and SCL Rise Time | tR | 300 | ns | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| SDA and SCL Fall Time | tF | 300 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| SDA and SCL Fall Time | tF | 100 | ns | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| STOP Condition Setup Time | tSU:STO | 4 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| STOP Condition Setup Time | tSU:STO | 0.6 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| STOP Condition Setup Time | tSU:STO | 0.25 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| Bus Free Time Between STOP and START | tBUF | 4.7 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Bus Free Time Between STOP and START | tBUF | 1.3 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| Bus Free Time Between STOP and START | tBUF | 0.5 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| SCL Low to Data Out Valid | tAA | 3.5 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| SCL Low to Data Out Valid | tAA | 0.9 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| SCL Low to Data Out Valid | tAA | 0.4 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| Data Out Hold Time | tDH | 100 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Data Out Hold Time | tDH | 50 | ns | Fast, VCC = 1.7 V, 5.5 V | 3 | ||
| WP Hold Time | tHD:WP | 2.5 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| WP Hold Time | tHD:WP | 1 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 | ||
| Write Cycle Time | tWR | 5 | ms | Standard, VCC = 1.7 V, 5.5 V | 3 | ||
| Power-up to Ready Mode | tPU | 1 | ms | Standard, VCC = 1.7 V, 5.5 V | 3 |
CAD (KiCad official)
- Symbol:
CAT24AA01TDI-GT3 - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
cat24aa01tdi-gt3-etched.step/cat24aa01tdi-gt3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cat24aa01tdi-gt3.step/cat24aa01tdi-gt3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
b68bfab16035298b, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CAT24AA01TDI-GT3
**onsemi** · EEPROM · TSOT-23-5
CAT24AA01TDI-GT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | input | The Serial Clock input accepts the clock signal generated by the Master and is used to clock data on SDA. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | SDA | bidirectional | The Serial Data I/O accepts input and delivers output data, is open drain in transmit mode, and data is acquired on the positive edge and delivered on the negative edge of SCL. |
| 4 | WP | input | When forced HIGH by an external source all write operations are inhibited, and when not driven it is pulled LOW internally. |
| 5 | VCC | power_in | Power supply, operating from 1.7 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSOT-23-5 |
| Category | Memory |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Voltage on any Pin with Respect to Ground | | -0.5 | | 6.5 | V | | 2 |
| Endurance | NEND | 1e+06 | | | Program/Erase Cycles | Page Mode @ 25°C | 2 |
| Data Retention | TDR | 100 | | | Years | | 2 |
| Read Current | ICCR | | | 0.5 | mA | Read, fSCL = 400 kHz | 2 |
| Write Current | ICCW | | | 1 | mA | Write | 2 |
| Standby Current | ISB | | | 1 | µA | All I/O Pins at GND or VCC | 2 |
| I/O Pin Leakage | IL | | | 1 | µA | Pin at GND or VCC | 2 |
| Input Low Voltage | VIL | -0.5 | | | V | | 2 |
| Output Low Voltage | VOL1 | | | 0.4 | V | VCC ≥ 2.5 V, IOL = 3.0 mA | 2 |
| Output Low Voltage | VOL2 | | | 0.2 | V | VCC < 2.5 V, IOL = 1.0 mA | 2 |
| SDA I/O Pin Capacitance | CIN | | | 8 | pF | VIN = 0 V | 2 |
| Input Capacitance (other pins) | CIN | | | 6 | pF | VIN = 0 V | 2 |
| WP Input Current | IWP | | | 100 | µA | VIN < VIH | 2 |
| WP Input Current | IWP | | | 1 | µA | VIN > VIH | 2 |
| Clock Frequency | FSCL | | | 100 | kHz | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Clock Frequency | FSCL | | | 400 | kHz | Fast, VCC = 1.7 V, 5.5 V | 3 |
| Clock Frequency | FSCL | | | 1000 | kHz | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| START Condition Hold Time | tHD:STA | 4 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| START Condition Hold Time | tHD:STA | 0.6 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| START Condition Hold Time | tHD:STA | 0.25 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| Low Period of SCL Clock | tLOW | 4.7 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Low Period of SCL Clock | tLOW | 1.3 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| Low Period of SCL Clock | tLOW | 0.5 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| High Period of SCL Clock | tHIGH | 4 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| High Period of SCL Clock | tHIGH | 0.6 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| High Period of SCL Clock | tHIGH | 0.5 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| START Condition Setup Time | tSU:STA | 4.7 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| START Condition Setup Time | tSU:STA | 0.6 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| START Condition Setup Time | tSU:STA | 0.25 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| Data In Setup Time | tSU:DAT | 250 | | | ns | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Data In Setup Time | tSU:DAT | 100 | | | ns | Fast, VCC = 1.7 V, 5.5 V | 3 |
| SDA and SCL Rise Time | tR | | | 1000 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 |
| SDA and SCL Rise Time | tR | | | 300 | ns | Fast, VCC = 1.7 V, 5.5 V | 3 |
| SDA and SCL Fall Time | tF | | | 300 | ns | Standard, VCC = 1.7 V, 5.5 V | 3 |
| SDA and SCL Fall Time | tF | | | 100 | ns | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| STOP Condition Setup Time | tSU:STO | 4 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| STOP Condition Setup Time | tSU:STO | 0.6 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| STOP Condition Setup Time | tSU:STO | 0.25 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| Bus Free Time Between STOP and START | tBUF | 4.7 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Bus Free Time Between STOP and START | tBUF | 1.3 | | | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| Bus Free Time Between STOP and START | tBUF | 0.5 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| SCL Low to Data Out Valid | tAA | | | 3.5 | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| SCL Low to Data Out Valid | tAA | | | 0.9 | µs | Fast, VCC = 1.7 V, 5.5 V | 3 |
| SCL Low to Data Out Valid | tAA | | | 0.4 | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| Data Out Hold Time | tDH | 100 | | | ns | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Data Out Hold Time | tDH | 50 | | | ns | Fast, VCC = 1.7 V, 5.5 V | 3 |
| WP Hold Time | tHD:WP | 2.5 | | | µs | Standard, VCC = 1.7 V, 5.5 V | 3 |
| WP Hold Time | tHD:WP | 1 | | | µs | 1 MHz, VCC = 2.5 V, 5.5 V | 3 |
| Write Cycle Time | tWR | | | 5 | ms | Standard, VCC = 1.7 V, 5.5 V | 3 |
| Power-up to Ready Mode | tPU | | | 1 | ms | Standard, VCC = 1.7 V, 5.5 V | 3 |
## CAD (KiCad official)
- Symbol: `CAT24AA01TDI-GT3`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-5`
- 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `cat24aa01tdi-gt3-etched.step` / `cat24aa01tdi-gt3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cat24aa01tdi-gt3.step` / `cat24aa01tdi-gt3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/cat24aa01tdi-gt3-d.pdf) (10 pp, sha256 `b68bfab16035298b`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cat24aa01tdi-gt3-datasheet.pdf)