main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers cahct1g32qdbvrq1: viewers · Ray 8d ago
cahct1g32qdbvrq1-etched.glb Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1-etched.step cahct1g32qdbvrq1: factory component page (tier=lcsc) · Ray 8d ago
cahct1g32qdbvrq1-hero.glb cahct1g32qdbvrq1: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
cahct1g32qdbvrq1-hero.overlay.json Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1.glb Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1.kicad_mod Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1.kicad_sym Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1.lbr Publish 0.1.0 · Ray 8d ago
cahct1g32qdbvrq1.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

CAHCT1G32QDBVRQ1

Texas Instruments · Gates · SOT-23-5

CAHCT1G32QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of the 2-input positive-OR gate, a TTL-compatible input that must be held at VCC or GND if unused.
2 B input Input B of the 2-input positive-OR gate, a TTL-compatible input that must be held at VCC or GND if unused.
3 GND power_in Ground pin.
4 Y output Output Y of the OR gate (Y = A + B), with ±8 mA drive at 4.5 V to 5.5 V supply.
5 VCC power_in Power pin, supply voltage 4.5 V to 5.5 V recommended (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5.5 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V max = VCC 4
High-level output current IOH -8 mA 4
Low-level output current IOL 8 mA 4
Input transition rise or fall rate Δt/Δv 20 ns/V 4
Operating free-air temperature TA -40 125 °C 4
Supply voltage VCC -0.5 7 V 4
Input voltage VI -0.5 7 V 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature range Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human body model, AEC Q100-002 4
ESD CDM V(ESD) -1000 1000 V Charged-device model, AEC Q100-011, all pins 4
Junction-to-ambient thermal resistance RθJA 278 °C/W DBV (SOT-23), 5 pins 4
High level output voltage VOH 4.4 4.5 V IOH = -50 µA, VCC = 4.5 V; min for -40°C to 125°C 5
High level output voltage VOH 3.7 3.94 V IOH = -8 mA, VCC = 4.5 V; min for -40°C to 125°C 5
Low level output voltage VOL 0.1 V IOL = 50 µA, VCC = 4.5 V; -40°C to 125°C 5
Low level output voltage VOL 0.52 V IOL = 8 mA, VCC = 4.5 V; -40°C to 125°C 5
Input leakage current II -1 1 µA VI = 5.5 V or GND, VCC = 0 V to 5.5 V; -40°C to 125°C 5
Supply current ICC 1 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V; max for -40°C to 125°C 5
Supply-current change ΔICC 1.65 mA One input at 3.4 V, other inputs at VCC or GND, VCC = 5.5 V; -40°C to 125°C 5
Input Capacitance Ci 2 10 pF VI = VCC or GND, VCC = 5 V; max for -40°C to 125°C 5
Propagation delay A or B to Y (tPLH) tPLH 1 5 9.5 ns CL = 15 pF, VCC = 5 V ± 0.5 V; -40°C to 125°C 5
Propagation delay A or B to Y (tPHL) tPHL 1 5 9.5 ns CL = 15 pF, VCC = 5 V ± 0.5 V; -40°C to 125°C 5
Propagation delay A or B to Y (tPLH) tPLH 1 5.5 10.5 ns CL = 50 pF, VCC = 5 V ± 0.5 V; -40°C to 125°C 5
Propagation delay A or B to Y (tPHL) tPHL 1 5.5 10.5 ns CL = 50 pF, VCC = 5 V ± 0.5 V; -40°C to 125°C 5
Power dissipation capacitance Cpd 11.5 pF No load, f = 1 MHz, VCC = 5 V, TA = 25°C 5

CAD (KiCad official)

  • Symbol: CAHCT1G32QDBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: cahct1g32qdbvrq1-etched.step / cahct1g32qdbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cahct1g32qdbvrq1.step / cahct1g32qdbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 2fc1a8706b88280a, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF