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CAHCT1G08QDBVRQ1

Texas Instruments · Logic Gates · SOT-23-5

CAHCT1G08QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of the 2-input positive AND gate (Y = A × B), TTL-compatible CMOS input with VIH min 2.00 V and VIL max 0.8 V; must not be left floating.
2 B input Input B of the 2-input positive AND gate (Y = A × B), TTL-compatible CMOS input with VIH min 2.00 V and VIL max 0.8 V; must not be left floating.
3 GND power_in Ground pin.
4 Y output Output Y of the AND gate, balanced CMOS push-pull output with ±8 mA drive at 5 V.
5 VCC power_in Positive supply pin, recommended operating range 4.5 V to 5.5 V (absolute maximum 7 V), with a 0.1 µF bypass capacitor recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (abs max) VCC -0.5 7 V 4
Input voltage range (abs max) VI -0.5 7 V 4
Input clamp current IIK -20 mA VI < -0.5 V 4
Output clamp current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND ICC/IGND -50 50 mA 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 4.5 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 5.5 V VCC 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Output current IO -8 8 mA 4
Input transition rise or fall rate Δt/Δv 20 ns/V 4
Operating free-air temperature TA -40 125 °C 4
High-level output voltage VOH 4.4 4.5 V IOH = -50µA, VCC 4.5V, TA = 25°C 5
High-level output voltage VOH 3.94 V IOH = -8mA, VCC 4.5V, TA = 25°C 5
High-level output voltage VOH 3.8 V IOH = -8mA, VCC 4.5V, -40°C to 125°C 5
Low-level output voltage VOL 0.1 V IOH = 50µA, VCC 4.5V 5
Low-level output voltage VOL 0.36 V IOH = 8 mA, VCC 4.5V, TA = 25°C 5
Low-level output voltage VOL 0.44 V IOH = 8 mA, VCC 4.5V, -40°C to 125°C 5
Input leakage current II -1 1 µA VI = 0V to VCC, VCC 0V to 5.5V, -40°C to 125°C 5
Supply current ICC 1 10 µA VI = VCC or GND, IO = 0, VCC 5.5V, -40°C to 125°C 5
Change in supply current ΔICC 1.5 mA One input at 0.3V or 3.4V, other inputs at VCC or GND, VCC 5.5V, -40°C to 125°C 5
Input capacitance Ci 2 10 pF VI = VCC or GND, VCC 5V 5
Propagation delay A or B to Y tPD 6.2 8 ns CL = 15pF 5
Propagation delay A or B to Y tPD 7.9 10 ns CL = 50pF 5
Power dissipation capacitance CPD 11 pF F = 1 MHz, VCC 5V 5
Junction-to-ambient thermal resistance RθJA 278 °C/W DBV (SOT-23) 5-pin 5
Junction-to-case (top) thermal resistance RθJC(top) 180.5 °C/W DBV (SOT-23) 5-pin 5
Junction-to-board thermal resistance RθJB 184.4 °C/W DBV (SOT-23) 5-pin 5
Junction-to-top characterization parameter ΨJT 115.4 °C/W DBV (SOT-23) 5-pin 5
Junction-to-board characterization parameter ΨJB 183.4 °C/W DBV (SOT-23) 5-pin 5
ESD HBM V(ESD) -2000 2000 V HBM per AEC Q100-002, classification level 2 4
ESD CDM V(ESD) -1000 1000 V CDM per AEC Q100-011, classification level C4B 4

CAD (KiCad official)

  • Symbol: CAHCT1G08QDBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: cahct1g08qdbvrq1-etched.step / cahct1g08qdbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cahct1g08qdbvrq1.step / cahct1g08qdbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 d700517e3edcd55d, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF