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CA3240AEZ

RENESAS · Pre-ordered Chips · PDIP-8

CA3240AEZ from RENESAS, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTPUT (A) output Output of amplifier A, which can swing to within 0.2V of V- with a 2k load to ground, and the output short-circuit duration is indefinite.
2 INV. INPUT (A) input Inverting input of amplifier A, which accepts inputs as low as 0.5V below V-, with a series current-limiting resistor recommended to keep input current below 1mA.
3 NON-INV. INPUT (A) input Non-inverting input of amplifier A, which accepts inputs as low as 0.5V below V-, with a series current-limiting resistor recommended to keep input current below 1mA.
4 V- power_in Negative supply terminal; the supply voltage range is 4V to 36V or 2V to 18V (V+ to V-), with a maximum of 36V between V+ and V-.
5 NON-INV. INPUT (B) input Non-inverting input of amplifier B, which accepts inputs as low as 0.5V below V-, with a series current-limiting resistor recommended to keep input current below 1mA.
6 INV. INPUT (B) input Inverting input of amplifier B, which accepts inputs as low as 0.5V below V-, with a series current-limiting resistor recommended to keep input current below 1mA.
7 OUTPUT (B) output Output of amplifier B, which can swing to within 0.2V of V- with a 2k load to ground, and the output short-circuit duration is indefinite.
8 V+ power_in Positive supply terminal; the maximum supply voltage between V+ and V- is 36V.

Key specifications

Parameter Value
Manufacturer RENESAS
Package PDIP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VIO 2 5 mV VSUPPLY = 15V, TA = 25°C (CA3240A column) 2
Input Offset Current IIO 0.5 20 pA VSUPPLY = 15V, TA = 25°C (CA3240A column) 2
Input Current II 10 40 pA VSUPPLY = 15V, TA = 25°C (CA3240A column) 2
Large-Signal Voltage Gain AOL 20 100 kV/V See Figures 12, 27; Note 3: VO = 26VP-P, +12V, -14V and RL = 2k 2
Large-Signal Voltage Gain AOL 86 100 dB See Figures 12, 27; Note 3: VO = 26VP-P, +12V, -14V and RL = 2k 2
Common Mode Rejection Ratio CMRR 32 320 V/V See Figure 17 2
Common Mode Rejection Ratio CMRR 70 90 dB See Figure 17 2
Common Mode Input Voltage Range VICR -15 12 V See Figure 24; typical range printed as -15.5 to +12.5 V 2
Power Supply Rejection Ratio PSRR 100 150 V/V See Figure 19 2
Power Supply Rejection Ratio PSRR 76 80 dB See Figure 19 2
Maximum Output Voltage (VOM+) VOM+ 12 13 V See Figures 23, 24; Note 4: At RL = 2k 2
Maximum Output Voltage (VOM-) VOM- -14 -14.4 V See Figures 23, 24; Note 4: At RL = 2k 2
Total Supply Current I+ 8 12 mA For both amps; See Figure 15 2
Total Device Dissipation PD 240 360 mW 2
Supply Voltage (between V+ and V-) 36 V Between V+ and V- 2
Differential Input Voltage 8 V 2
Input Current 1 mA 2
Maximum Storage Temperature Range -65 150 °C 2
Maximum Junction Temperature (Plastic Package) 150 °C Plastic package 2
Maximum Lead Temperature (Soldering) 300 °C Soldering 10s 2
Temperature Range -40 85 °C 2
Voltage Range 4 36 V 4V to 36V option 2
Voltage Range 2 18 V 2V to 18V option 2
Thermal Resistance, Junction to Ambient (Typical, Note 2) θJA 100 °C/W 8 Lead PDIP package; Note 2: measured with component mounted on evaluation PC board in free air 2

CAD (KiCad official)

  • Symbol: CA3240AEZ
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: ca3240aez-etched.step / ca3240aez-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca3240aez.step / ca3240aez.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (15 pp, sha256 059f5a72dc88d228, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF