component
CA3140EZ
Public Made by Adomby adom
RENESAS Operational Amplifier, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
CA3140EZ
RENESAS · Operational Amplifier · DIP-8
CA3140EZ from RENESAS, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET NULL | passive | Offset null terminal, used with pin 5 for input offset voltage nulling. |
| 2 | INV. INPUT | input | Inverting input of the PMOS input stage, whose common-mode input voltage can swing 0.5V below the negative supply terminal. |
| 3 | NON-INV. INPUT | input | Non-inverting input of the PMOS input stage, whose common-mode input voltage can swing 0.5V below the negative supply terminal. |
| 4 | V- | power_in | Negative supply terminal; the device operates from 4V to 36V supply (single or dual supply). |
| 5 | OFFSET NULL | passive | Offset null terminal, used with pin 1 for input offset voltage nulling. |
| 6 | OUTPUT | output | Output of the bipolar output stage, which has built-in protection against damage from a short circuit to either supply rail or to ground. |
| 7 | V+ | power_in | Positive supply terminal; the device operates from 4V to 36V supply (single or dual supply). |
| 8 | STROBE | input | Strobe terminal shown in the pinout; its function is not described in the provided pages. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | DIP-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | /VIO/ | 5 | 15 | mV | VSUPPLY = ±15V, TA = 25oC | 3 | |
| Input Offset Current | /IIO/ | 0.5 | 30 | pA | VSUPPLY = ±15V, TA = 25oC | 3 | |
| Input Current | II | 10 | 50 | pA | VSUPPLY = ±15V, TA = 25oC | 3 | |
| Large Signal Voltage Gain | AOL | 20 | 100 | kV/V | VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) | 4 | |
| Large Signal Voltage Gain | AOL | 86 | 100 | dB | VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) | 4 | |
| Common Mode Rejection Ratio | CMRR | 32 | 320 | µV/V | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Common Mode Rejection Ratio | CMRR | 70 | 90 | dB | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Common Mode Input Voltage Range | VICR | -15 | 11 | V | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Power-Supply Rejection Ratio | PSRR | 100 | 150 | µV/V | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Power-Supply Rejection Ratio | PSRR | 76 | 80 | dB | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Max Output Voltage VOM+ | VOM+ | 12 | 13 | V | VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) | 4 | |
| Max Output Voltage VOM- | VOM- | -14 | -14.4 | V | VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) | 4 | |
| Supply Current | I+ | 4 | 6 | mA | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Device Dissipation | PD | 120 | 180 | mW | VSUPPLY = ±15V, TA = 25oC | 4 | |
| Operating Temperature Range | TA | -55 | 125 | °C | 3 | ||
| Supply Voltage (single or dual supply) | VSUPPLY | 4 | 36 | V | Single or dual supply | 1 | |
| DC Supply Voltage (V+ to V-) | VSUPPLY | 36 | V | Between V+ and V- terminals | 3 | ||
| Differential Mode Input Voltage | VID | 8 | V | 3 | |||
| Input Terminal Current | II | 1 | mA | 3 | |||
| Maximum Junction Temperature (Plastic Package) | TJ | 150 | °C | 3 | |||
| Maximum Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Thermal Resistance Junction-to-Ambient (PDIP) | θJA | 115 | °C/W | Typical, Note 1; component mounted on low effective thermal conductivity test board in free air | 3 |
CAD (KiCad official)
- Symbol:
CA3140EZ - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
ca3140ez-etched.step/ca3140ez-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ca3140ez.step/ca3140ez.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (23 pp, sha256
c5f7bf57b9b0c2cc, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CA3140EZ
**RENESAS** · Operational Amplifier · DIP-8
CA3140EZ from RENESAS, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET NULL | passive | Offset null terminal, used with pin 5 for input offset voltage nulling. |
| 2 | INV. INPUT | input | Inverting input of the PMOS input stage, whose common-mode input voltage can swing 0.5V below the negative supply terminal. |
| 3 | NON-INV. INPUT | input | Non-inverting input of the PMOS input stage, whose common-mode input voltage can swing 0.5V below the negative supply terminal. |
| 4 | V- | power_in | Negative supply terminal; the device operates from 4V to 36V supply (single or dual supply). |
| 5 | OFFSET NULL | passive | Offset null terminal, used with pin 1 for input offset voltage nulling. |
| 6 | OUTPUT | output | Output of the bipolar output stage, which has built-in protection against damage from a short circuit to either supply rail or to ground. |
| 7 | V+ | power_in | Positive supply terminal; the device operates from 4V to 36V supply (single or dual supply). |
| 8 | STROBE | input | Strobe terminal shown in the pinout; its function is not described in the provided pages. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | DIP-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | /VIO/ | | 5 | 15 | mV | VSUPPLY = ±15V, TA = 25oC | 3 |
| Input Offset Current | /IIO/ | | 0.5 | 30 | pA | VSUPPLY = ±15V, TA = 25oC | 3 |
| Input Current | II | | 10 | 50 | pA | VSUPPLY = ±15V, TA = 25oC | 3 |
| Large Signal Voltage Gain | AOL | 20 | 100 | | kV/V | VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) | 4 |
| Large Signal Voltage Gain | AOL | 86 | 100 | | dB | VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) | 4 |
| Common Mode Rejection Ratio | CMRR | | 32 | 320 | µV/V | VSUPPLY = ±15V, TA = 25oC | 4 |
| Common Mode Rejection Ratio | CMRR | 70 | 90 | | dB | VSUPPLY = ±15V, TA = 25oC | 4 |
| Common Mode Input Voltage Range | VICR | -15 | | 11 | V | VSUPPLY = ±15V, TA = 25oC | 4 |
| Power-Supply Rejection Ratio | PSRR | | 100 | 150 | µV/V | VSUPPLY = ±15V, TA = 25oC | 4 |
| Power-Supply Rejection Ratio | PSRR | 76 | 80 | | dB | VSUPPLY = ±15V, TA = 25oC | 4 |
| Max Output Voltage VOM+ | VOM+ | 12 | 13 | | V | VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) | 4 |
| Max Output Voltage VOM- | VOM- | -14 | -14.4 | | V | VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) | 4 |
| Supply Current | I+ | | 4 | 6 | mA | VSUPPLY = ±15V, TA = 25oC | 4 |
| Device Dissipation | PD | | 120 | 180 | mW | VSUPPLY = ±15V, TA = 25oC | 4 |
| Operating Temperature Range | TA | -55 | | 125 | °C | | 3 |
| Supply Voltage (single or dual supply) | VSUPPLY | 4 | | 36 | V | Single or dual supply | 1 |
| DC Supply Voltage (V+ to V-) | VSUPPLY | | | 36 | V | Between V+ and V- terminals | 3 |
| Differential Mode Input Voltage | VID | | | 8 | V | | 3 |
| Input Terminal Current | II | | | 1 | mA | | 3 |
| Maximum Junction Temperature (Plastic Package) | TJ | | | 150 | °C | | 3 |
| Maximum Storage Temperature Range | TSTG | -65 | | 150 | °C | | 3 |
| Thermal Resistance Junction-to-Ambient (PDIP) | θJA | | 115 | | °C/W | Typical, Note 1; component mounted on low effective thermal conductivity test board in free air | 3 |
## CAD (KiCad official)
- Symbol: `CA3140EZ`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `ca3140ez-etched.step` / `ca3140ez-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ca3140ez.step` / `ca3140ez.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588887467840196608) (23 pp, sha256 `c5f7bf57b9b0c2cc`, retrieved 2026-10-14, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ca3140ez-datasheet.pdf)