component

CA3140AMZ96

Public Made by Adom

by adom

RENESAS Operational Amplifier, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs ca3140amz96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ca3140amz96: viewers · Ray
ca3140amz96-etched.fit.json ca3140amz96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ca3140amz96-etched.glb ca3140amz96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ca3140amz96-etched.step ca3140amz96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ca3140amz96.glb Publish 0.1.0 · Ray
ca3140amz96.kicad_mod Publish 0.1.0 · Ray
ca3140amz96.kicad_sym ca3140amz96: factory component page (tier=mfr) · Ray
ca3140amz96.lbr ca3140amz96: factory component page (tier=mfr) · Ray
ca3140amz96.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json ca3140amz96: specified limits as data (metadata.characteristics, 23 rows from the datasheet) · Ray
README.md ca3140amz96: specified limits as data (metadata.characteristics, 23 rows from the datasheet) · Ray

CA3140AMZ96

RENESAS · Operational Amplifier · SOIC-8

CA3140AMZ96 from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET_NULL passive Offset-null adjust terminal. Connect a potentiometer (typ ~18kΩ for CA3140A) between pins 1 and 5 with the wiper to V- (pin 4) to trim the input offset voltage to zero.
2 INV_INPUT input Inverting input (-) of the op-amp. High-impedance PMOS gate; input impedance ~1.5TΩ, input current ~10pA (typ, ±15V supply). Absolute input voltage limited to (V+ +8V) to (V- -0.5V).
3 NON-INV_INPUT input Non-inverting input (+) of the op-amp. High-impedance PMOS gate; common-mode range extends from ~V- -0.5V up to ~V+ -1.5V at ±15V (typ -15.5V to +12.5V).
4 V- power_in Negative supply rail (or ground in single-supply operation). Total supply voltage V+ to V- must not exceed 36V. Serves as the reference to which the output can swing to within ~0.13V in single-supply use.
5 OFFSET_NULL passive Second offset-null adjust terminal. Used with pin 1 and a potentiometer whose wiper returns to V- (pin 4) to trim V_IO. May alternatively be used with pin 4 for offset adjustment.
6 OUTPUT output Bipolar op-amp output. Short-circuit protected to either supply rail. Typical output swing +13V/-14.4V at ±15V into 2kΩ; source/sink short-circuit currents ~40mA/18mA.
7 V+ power_in Positive supply rail. Operating supply range 4V to 36V (single or dual). Typical supply current 4mA at ±15V (6mA max).
8 STROBE input Strobe/output-disable terminal. Sinking ~220µA from pin 8 to pin 4 (V-) forces the output to swing low, allowing the amplifier to be gated off. Also provides an access point for adding an external compensation capacitor if additional frequency roll-off is desired.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • CA3140AMZ96
  • CA3140AMZ96AM96
  • CA3140AMZ96M
  • CA3140AMZ96M96
  • CA3140AMZ96AE
  • CA3140AMZ96AEZ
  • CA3140AMZ96E
  • CA3140AMZ96EZ

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (between V+ and V- terminals) 36 V V+ to V- terminals 3
Differential Mode Input Voltage 8 V 3
Input Terminal Current 1 mA 3
Operating Temperature Range TA -55 125 oC 3
Supply Voltage (single or dual supply) 4 36 V Operation from 4V to 36V, single or dual supply (Features / description) 1
Maximum Storage Temperature Range -65 150 oC 3
Maximum Junction Temperature (Plastic Package) 150 oC 3
Maximum Lead Temperature (Soldering) 300 oC Soldering 10s, SOIC lead tips only 3
Thermal Resistance Junction-to-Ambient, SOIC Package θJA 165 oC/W Typical, Note 1: component mounted on low effective thermal conductivity test board in free air 3
Input Offset Voltage /VIO/ 2 5 mV VSUPPLY = ±15V, TA = 25oC 3
Input Offset Current /IIO/ 0.5 20 pA VSUPPLY = ±15V, TA = 25oC 3
Input Current II 10 40 pA VSUPPLY = ±15V, TA = 25oC 3
Large Signal Voltage Gain AOL 20 100 kV/V VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) 4
Large Signal Voltage Gain AOL 86 100 dB VSUPPLY = ±15V, TA = 25oC; VO = 26VP-P, +12V, -14V and RL = 2kΩ (Note 3) 4
Common Mode Rejection Ratio CMRR 32 320 µV/V VSUPPLY = ±15V, TA = 25oC 4
Common Mode Rejection Ratio CMRR 70 90 dB VSUPPLY = ±15V, TA = 25oC 4
Common Mode Input Voltage Range VICR -15 12 V VSUPPLY = ±15V, TA = 25oC 4
Power-Supply Rejection Ratio ΔVIO/ΔVS PSRR 100 150 µV/V VSUPPLY = ±15V, TA = 25oC 4
Power-Supply Rejection Ratio ΔVIO/ΔVS PSRR 76 80 dB VSUPPLY = ±15V, TA = 25oC 4
Max Output Voltage, positive VOM+ 12 13 V VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) 4
Max Output Voltage, negative VOM- -14 -14.4 V VSUPPLY = ±15V, TA = 25oC; RL = 2kΩ (Note 4) 4
Supply Current I+ 4 6 mA VSUPPLY = ±15V, TA = 25oC 4
Device Dissipation PD 120 180 mW VSUPPLY = ±15V, TA = 25oC 4

CAD (KiCad official)

  • Symbol: CA3140AMZ96
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ca3140amz96-etched.step / ca3140amz96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca3140amz96.step / ca3140amz96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (23 pp, sha256 8e73779b729359d8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF