component

CA3130MZ

Public Made by Adom

by adom

RENESAS Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatorca3130mzfactory-2.0.0extractor-text

Verified CA3130MZ

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CA3130MZ · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C4368909, digikey CA3130MZ-ND, mouser 968-CA3130MZ
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-qrg0s7fs/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ca3130mz.kicad_sym✓ ca3130mz.kicad_mod✓ ca3130mz.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers ca3130mz: viewers · Ray 1d ago
ca3130mz-etched.glb Publish 0.1.0 · Ray 1d ago
ca3130mz-etched.step ca3130mz: factory component page (tier=mfr) · Ray 1d ago
ca3130mz-hero.glb ca3130mz: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
ca3130mz-hero.overlay.json Publish 0.1.0 · Ray 1d ago
ca3130mz.glb Publish 0.1.0 · Ray 1d ago
ca3130mz.kicad_mod Publish 0.1.0 · Ray 1d ago
ca3130mz.kicad_sym Publish 0.1.0 · Ray 1d ago
ca3130mz.lbr Publish 0.1.0 · Ray 1d ago
ca3130mz.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 1d ago

CA3130MZ

RENESAS · Operational Amplifier · SOIC-8

CA3130MZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OFFSET NULL passive Offset-null terminal used with pin 5 to adjust the input offset voltage for applications requiring offset-null capability.
2 INV. INPUT input Inverting input of the MOSFET-input op amp; the input terminals can be swung 0.5V below the negative supply rail.
3 NON-INV. INPUT input Non-inverting input of the MOSFET-input op amp; the common-mode input voltage range extends 0.5V below the negative supply terminal.
4 V- power_in Negative supply terminal; the device operates from 5V to 16V total supply (2.5V to 8V in split supply per the datasheet).
5 OFFSET NULL passive Second offset-null terminal used with pin 1 to adjust the input offset voltage.
6 OUTPUT output CMOS output stage that can swing to within 10mV of either supply terminal at very high load impedance.
7 V+ power_in Positive supply terminal; absolute maximum DC supply voltage between V+ and V- is 16V.
8 STROBE input Strobe terminal provided to strobe the output stage; the datasheet does not state its logic thresholds.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VIO 8 15 mV VS = 7.5V 2
Input Offset Current IIO 0.5 30 pA VS = 7.5V 2
Input Current II 5 50 pA VS = 7.5V 2
Large-Signal Voltage Gain AOL 50 320 kV/V VO = 10VP-P, RL = 2k 2
Large-Signal Voltage Gain AOL 94 110 dB VO = 10VP-P, RL = 2k 2
Common-Mode Rejection Ratio CMRR 70 90 dB 2
Common-Mode Input Voltage Range VICR -0.5 12 V 2
Power-Supply Rejection Ratio VIO/VS 32 320 V/V VS = 7.5V 2
Maximum Output Voltage (positive) VOM+ 12 13.3 V RL = 2k 2
Maximum Output Voltage (negative) VOM- 0.002 0.01 V RL = 2k 2
Maximum Output Voltage (positive) VOM+ 14.99 15 V RL = 2
Maximum Output Voltage (negative) VOM- 0 0.01 V RL = 2
Maximum Output Current (source) IOM+ 12 22 45 mA VO = 0V 2
Maximum Output Current (sink) IOM- 12 20 45 mA VO = 15V 2
Supply Current I+ 10 15 mA VO = 7.5V, RL = 2
Supply Current I+ 2 3 mA VO = 0V, RL = 2
Differential Input Voltage 8 V 2
Input-Terminal Current 1 mA 2
Maximum Junction Temperature (plastic package) 150 °C 2
Maximum Storage Temperature Range -65 150 °C 2
Maximum Lead Temperature (soldering) 300 °C Soldering 10s (SOIC - lead tips only) 2
Operating Temperature Range -50 125 °C 2
Total Supply Voltage 5 16 V Total supply voltage (from features/description text) 1
Thermal Resistance, junction-to-ambient (SOIC package) JA 160 °C/W SOIC package; Note 2: PC board in free air 2

CAD (KiCad official)

  • Symbol: CA3130MZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ca3130mz-etched.step / ca3130mz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ca3130mz.step / ca3130mz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (17 pp, sha256 26b61531fa73f0a8, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF