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CA-IS3763LB
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Chipanalog Digital Isolators, SSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CA-IS3763LB
Chipanalog · Digital Isolators · SSOP-16
CA-IS3763LB from Chipanalog, in a SSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDA | power_in | A-side supply voltage, recommended 2.375 V to 5.5 V (3.3 V or 5.0 V typical) and absolute maximum 7.0 V relative to GNDA. |
| 2 | VI1 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 3 | VI2 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 4 | VI3 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 5 | VO4 | output | A-side logic output (channel 4 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 6 | VO5 | output | A-side logic output (channel 5 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 7 | VO6 | output | A-side logic output (channel 6 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 8 | GNDA | power_in | A-side ground reference for VDDA and the A-side logic signals, isolated from GNDB by the isolation barrier. |
| 9 | GNDB | power_in | B-side ground reference for VDDB and the B-side logic signals, isolated from GNDA by the isolation barrier. |
| 10 | VI6 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 11 | VI5 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 12 | VI4 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 13 | VO3 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 14 | VO2 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 15 | VO1 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 16 | VDDB | power_in | B-side supply voltage, recommended 2.375 V to 5.5 V (3.3 V or 5.0 V typical) and absolute maximum 7.0 V relative to GNDB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Chipanalog |
| Package | SSOP-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDDA, VDDB (peak, relative to GNDA/GNDB) | VDDA, VDDB | -0.5 | 7 | V | 5 | ||
| Input voltage Ax, Bx (printed max VDD+0.5; footnote 3: not to exceed 7 V) | Vin | -0.5 | V | 5 | |||
| Output current | IO | -20 | 20 | mA | 5 | ||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature range | TSTG | -65 | 150 | °C | 5 | ||
| Supply voltage VDDA, VDDB (typ printed 3.3/5.0) | VDDA, VDDB | 2.375 | 5.5 | V | 5 | ||
| VDD undervoltage threshold, rising (UVLO+) | VDD（UVLO+） | 1.95 | 2.24 | 2.375 | V | VDD rising | 5 |
| VDD undervoltage threshold, falling (UVLO-) | VDD（UVLO-） | 1.88 | 2.1 | 2.325 | V | VDD falling | 5 |
| VDD undervoltage hysteresis | VHYS（UVLO） | 70 | 140 | 250 | mV | 5 | |
| High-level output current | IOH | -4 | mA | VDDO1 = 5V | 5 | ||
| High-level output current | IOH | -2 | mA | VDDO = 3.3V | 5 | ||
| High-level output current | IOH | -1 | mA | VDDO = 2.5V | 5 | ||
| Low-level output current | IOL | 4 | mA | VDDO = 5V | 5 | ||
| Low-level output current | IOL | 2 | mA | VDDO = 3.3V | 5 | ||
| Low-level output current | IOL | 1 | mA | VDDO = 2.5V | 5 | ||
| Input threshold logic high | VIH | 2 | V | 5 | |||
| Input threshold logic low | VIL | 0.8 | V | 5 | |||
| Signal data rate | DR | 0 | 150 | Mbps | 5 | ||
| Ambient temperature | TA | -40 | 27 | 125 | °C | 5 | |
| Input threshold logic high (VIT+(IN)) | VIT+(IN) | 2 | V | VDDA=VDDB=5V ±10%, TA=-40 to 125°C | 9 | ||
| Input threshold logic low (VIT-(IN)) | VIT-(IN) | 0.8 | V | VDDA=VDDB=5V ±10%, TA=-40 to 125°C | 9 | ||
| Input high-level leakage current | IIH | 20 | µA | VIH = VDDA at Ax or Bx; VDDA=VDDB=5V ±10% | 9 | ||
| Input low-level leakage current | IIL | -20 | µA | VIL = 0 V at Ax or Bx; VDDA=VDDB=5V ±10% | 9 | ||
| Common-mode transient immunity | CMTI | 50 | kV/µs | VI = VDDI1 or 0 V, VCM = 1200 V; Fig 8-3; VDDA=VDDB=5V ±10% | 9 | ||
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | 2.9 | 4.4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | 2.9 | 4.4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | 5.5 | 8.4 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | 5.5 | 8.4 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | 2.7 | 4.1 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 | |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | 2.7 | 4.1 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 | |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | 5.3 | 8.1 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 | |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | 5.3 | 8.1 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 | |
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | 2.7 | 4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 | |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | 2.7 | 4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 | |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | 5.2 | 8 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 | |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | 5.2 | 8 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 | |
| Supply current IDDA, AC 1 Mbps (500 kHz), L variant | IDDA | 4.3 | 6.5 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDB, AC 1 Mbps (500 kHz), L variant | IDDB | 4.3 | 6.5 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDA, AC 10 Mbps (5 MHz), L variant | IDDA | 5.7 | 8.4 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDB, AC 10 Mbps (5 MHz), L variant | IDDB | 5.7 | 8.4 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDA, AC 100 Mbps (50 MHz), L variant | IDDA | 19.9 | 30 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Supply current IDDB, AC 100 Mbps (50 MHz), L variant | IDDB | 19.9 | 30 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 | |
| Output voltage logic high (min printed VDDO1-0.4; typ 4.8) | VOH | 4.8 | V | IOH = -4mA; Fig 8-1; VDDA=VDDB=5V ±10% | 9 | ||
| Output voltage logic low | VOL | 0.2 | 0.4 | V | IOL = 4mA; Fig 8-1; VDDA=VDDB=5V ±10% | 9 | |
| Output voltage logic high (min printed VDDO1-0.4; typ 3.1) | VOH | 3.1 | V | IOH = -2mA; Fig 8-1; VDDA=VDDB=3.3V ±10% | 9 | ||
| Output voltage logic high (min printed VDDO1-0.4; typ 2.3) | VOH | 2.3 | V | IOH = -1mA; Fig 8-1; VDDA=VDDB=2.5V ±5% | 9 | ||
| Output impedance (typ only; footnote: ~50Ω ±40%) | ZO | 50 | Ω | 9 | |||
| Thermal resistance, junction to ambient (single value printed) | RθJA | 110 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
CA-IS3763LB - Footprint:
Package_SO:SSOP-16_5.3x6.2mm_P0.65mm - 3D model: SSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ca-is3763lb-etched.step/ca-is3763lb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ca-is3763lb.step/ca-is3763lb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Chipanalog datasheet (22 pp, sha256
0d88c3748184ff45, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CA-IS3763LB
**Chipanalog** · Digital Isolators · SSOP-16
CA-IS3763LB from Chipanalog, in a SSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDA | power_in | A-side supply voltage, recommended 2.375 V to 5.5 V (3.3 V or 5.0 V typical) and absolute maximum 7.0 V relative to GNDA. |
| 2 | VI1 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 3 | VI2 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 4 | VI3 | input | A-side logic input with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 5 | VO4 | output | A-side logic output (channel 4 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 6 | VO5 | output | A-side logic output (channel 5 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 7 | VO6 | output | A-side logic output (channel 6 on CA-IS3763); rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 8 | GNDA | power_in | A-side ground reference for VDDA and the A-side logic signals, isolated from GNDB by the isolation barrier. |
| 9 | GNDB | power_in | B-side ground reference for VDDB and the B-side logic signals, isolated from GNDA by the isolation barrier. |
| 10 | VI6 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 11 | VI5 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 12 | VI4 | input | B-side logic input on CA-IS3763 with Schmitt-trigger threshold; VIH minimum 2.0 V, VIL maximum 0.8 V, input leakage within ±20 µA. |
| 13 | VO3 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 14 | VO2 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 15 | VO1 | output | B-side logic output; rated IOH -4 mA / IOL 4 mA at 5 V (-2 / 2 mA at 3.3 V, -1 / 1 mA at 2.5 V) with nominal 50 Ω output impedance. |
| 16 | VDDB | power_in | B-side supply voltage, recommended 2.375 V to 5.5 V (3.3 V or 5.0 V typical) and absolute maximum 7.0 V relative to GNDB. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Chipanalog |
| Package | SSOP-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDDA, VDDB (peak, relative to GNDA/GNDB) | VDDA, VDDB | -0.5 | | 7 | V | | 5 |
| Input voltage Ax, Bx (printed max VDD+0.5; footnote 3: not to exceed 7 V) | Vin | -0.5 | | | V | | 5 |
| Output current | IO | -20 | | 20 | mA | | 5 |
| Junction temperature | TJ | | | 150 | °C | | 5 |
| Storage temperature range | TSTG | -65 | | 150 | °C | | 5 |
| Supply voltage VDDA, VDDB (typ printed 3.3/5.0) | VDDA, VDDB | 2.375 | | 5.5 | V | | 5 |
| VDD undervoltage threshold, rising (UVLO+) | VDD（UVLO+） | 1.95 | 2.24 | 2.375 | V | VDD rising | 5 |
| VDD undervoltage threshold, falling (UVLO-) | VDD（UVLO-） | 1.88 | 2.1 | 2.325 | V | VDD falling | 5 |
| VDD undervoltage hysteresis | VHYS（UVLO） | 70 | 140 | 250 | mV | | 5 |
| High-level output current | IOH | | | -4 | mA | VDDO1 = 5V | 5 |
| High-level output current | IOH | | | -2 | mA | VDDO = 3.3V | 5 |
| High-level output current | IOH | | | -1 | mA | VDDO = 2.5V | 5 |
| Low-level output current | IOL | | | 4 | mA | VDDO = 5V | 5 |
| Low-level output current | IOL | | | 2 | mA | VDDO = 3.3V | 5 |
| Low-level output current | IOL | | | 1 | mA | VDDO = 2.5V | 5 |
| Input threshold logic high | VIH | 2 | | | V | | 5 |
| Input threshold logic low | VIL | | | 0.8 | V | | 5 |
| Signal data rate | DR | 0 | | 150 | Mbps | | 5 |
| Ambient temperature | TA | -40 | 27 | 125 | °C | | 5 |
| Input threshold logic high (VIT+(IN)) | VIT+(IN) | 2 | | | V | VDDA=VDDB=5V ±10%, TA=-40 to 125°C | 9 |
| Input threshold logic low (VIT-(IN)) | VIT-(IN) | | | 0.8 | V | VDDA=VDDB=5V ±10%, TA=-40 to 125°C | 9 |
| Input high-level leakage current | IIH | | | 20 | µA | VIH = VDDA at Ax or Bx; VDDA=VDDB=5V ±10% | 9 |
| Input low-level leakage current | IIL | -20 | | | µA | VIL = 0 V at Ax or Bx; VDDA=VDDB=5V ±10% | 9 |
| Common-mode transient immunity | CMTI | 50 | | | kV/µs | VI = VDDI1 or 0 V, VCM = 1200 V; Fig 8-3; VDDA=VDDB=5V ±10% | 9 |
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | | 2.9 | 4.4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | | 2.9 | 4.4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | | 5.5 | 8.4 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | | 5.5 | 8.4 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | | 2.7 | 4.1 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | | 2.7 | 4.1 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | | 5.3 | 8.1 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | | 5.3 | 8.1 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=3.3V ±10% | 11 |
| Supply current IDDA, DC, L variant (VIN=0V) | IDDA | | 2.7 | 4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 |
| Supply current IDDB, DC, L variant (VIN=0V) | IDDB | | 2.7 | 4 | mA | DC signal; VIN = 0V (CA-IS3763L); VIN = VDDI1 (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 |
| Supply current IDDA, DC, L variant (VIN=VDDI1) | IDDA | | 5.2 | 8 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 |
| Supply current IDDB, DC, L variant (VIN=VDDI1) | IDDB | | 5.2 | 8 | mA | DC signal; VIN = VDDI1 (CA-IS3763L); VIN = 0V (CA-IS3763H); VDDA=VDDB=2.5V ±5% | 12 |
| Supply current IDDA, AC 1 Mbps (500 kHz), L variant | IDDA | | 4.3 | 6.5 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDB, AC 1 Mbps (500 kHz), L variant | IDDB | | 4.3 | 6.5 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDA, AC 10 Mbps (5 MHz), L variant | IDDA | | 5.7 | 8.4 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDB, AC 10 Mbps (5 MHz), L variant | IDDB | | 5.7 | 8.4 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDA, AC 100 Mbps (50 MHz), L variant | IDDA | | 19.9 | 30 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Supply current IDDB, AC 100 Mbps (50 MHz), L variant | IDDB | | 19.9 | 30 | mA | All channel inputs 50% duty square wave, 5V amplitude; CL = 15 pF; VDDA=VDDB=5V ±10% | 10 |
| Output voltage logic high (min printed VDDO1-0.4; typ 4.8) | VOH | | 4.8 | | V | IOH = -4mA; Fig 8-1; VDDA=VDDB=5V ±10% | 9 |
| Output voltage logic low | VOL | | 0.2 | 0.4 | V | IOL = 4mA; Fig 8-1; VDDA=VDDB=5V ±10% | 9 |
| Output voltage logic high (min printed VDDO1-0.4; typ 3.1) | VOH | | 3.1 | | V | IOH = -2mA; Fig 8-1; VDDA=VDDB=3.3V ±10% | 9 |
| Output voltage logic high (min printed VDDO1-0.4; typ 2.3) | VOH | | 2.3 | | V | IOH = -1mA; Fig 8-1; VDDA=VDDB=2.5V ±5% | 9 |
| Output impedance (typ only; footnote: ~50Ω ±40%) | ZO | | 50 | | Ω | | 9 |
| Thermal resistance, junction to ambient (single value printed) | RθJA | | 110 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `CA-IS3763LB`
- Footprint: `Package_SO:SSOP-16_5.3x6.2mm_P0.65mm`
- 3D model: SSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ca-is3763lb-etched.step` / `ca-is3763lb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ca-is3763lb.step` / `ca-is3763lb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Chipanalog datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604430522961707008) (22 pp, sha256 `0d88c3748184ff45`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ca-is3763lb-datasheet.pdf)