component
CA-IS3761HW
Public Made by Adomby adom
Chipanalog Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"name": "VDDA",
"type": "power_in",
"description": "A-side supply voltage, recommended 2.375 V to 5.5 V with an absolute maximum of 6.0 V, referenced to GNDA."
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{
"number": "2",
"name": "VI1",
"type": "input",
"description": "A-side forward logic input with Schmitt-trigger thresholds, VIH minimum 2.0 V and VIL maximum 0.8 V."
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{
"number": "3",
"name": "VI2",
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"description": "A-side forward logic input with Schmitt-trigger thresholds, VIH minimum 2.0 V and VIL maximum 0.8 V."
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{
"number": "4",
"name": "VI3",
"type": "input",
"description": "A-side forward logic input with Schmitt-trigger thresholds, VIH minimum 2.0 V and VIL maximum 0.8 V."
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{
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"description": "A-side forward logic input with Schmitt-trigger thresholds, VIH minimum 2.0 V and VIL maximum 0.8 V."
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{
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{
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"name": "VO6",
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"description": "A-side reverse-channel logic output, rail-to-rail with about 50 Ω output impedance; it takes the default-high state (CA-IS376xH) when the input-side supply is lost."
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{
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{
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{
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{
"number": "11",
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{
"number": "12",
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{
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"name": "VO3",
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{
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"description": "B-side forward-channel logic output, rail-to-rail with about 50 Ω output impedance."
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{
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{
"number": "16",
"name": "VDDB",
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"Package": "SOIC-16-300mil",
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"name": "电源电压 (VDDA, VDDB)",
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{
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{
"name": "存储温度范围",
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"unit": "°C",
"min": -65,
"typ": null,
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{
"name": "电源电压 (VDDA, VDDB)",
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"min": 2.375,
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{
"name": "VDD 电源电压上升时的欠压阈值",
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{
"name": "VDD 电源电压下降时的欠压阈值",
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"min": 1.88,
"typ": 2.1,
"max": 2.325,
"conditions": "",
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{
"name": "VDD 迟滞欠压阈值",
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"unit": "mV",
"min": 70,
"typ": 140,
"max": 250,
"conditions": "",
"source_page": 5,
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{
"name": "高电平输出电流",
"symbol": "IOH",
"kind": "recommended_operating",
"unit": "mA",
"min": -4,
"typ": null,
"max": null,
"conditions": "VDDO = 5V",
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{
"name": "高电平输出电流",
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"unit": "mA",
"min": -2,
"typ": null,
"max": null,
"conditions": "VDDO = 3.3V",
"source_page": 5,
"source": "datasheet"
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{
"name": "高电平输出电流",
"symbol": "IOH",
"kind": "recommended_operating",
"unit": "mA",
"min": -1,
"typ": null,
"max": null,
"conditions": "VDDO = 2.5V",
"source_page": 5,
"source": "datasheet"
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{
"name": "低电平输出电流",
"symbol": "IOL",
"kind": "recommended_operating",
"unit": "mA",
"min": null,
"typ": null,
"max": 4,
"conditions": "VDDO = 5V",
"source_page": 5,
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{
"name": "低电平输出电流",
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{
"name": "低电平输出电流",
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"min": null,
"typ": null,
"max": 1,
"conditions": "VDDO = 2.5V",
"source_page": 5,
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{
"name": "输入阈值逻辑高电平",
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"min": 2,
"typ": null,
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"source_page": 5,
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{
"name": "输入阈值逻辑低电平",
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"min": null,
"typ": null,
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"source_page": 5,
"source": "datasheet"
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{
"name": "信号传输速率",
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"unit": "Mbps",
"min": 0,
"typ": null,
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"conditions": "",
"source_page": 5,
"source": "datasheet"
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{
"name": "环境温度",
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"min": -40,
"typ": 27,
"max": 125,
"conditions": "",
"source_page": 5,
"source": "datasheet"
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{
"name": "输出电压逻辑低电平",
"symbol": "VOL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": 0.2,
"max": 0.4,
"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C; IOL = 4mA; 图 7-1",
"source_page": 9,
"source": "datasheet"
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{
"name": "正输入阈值",
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"min": 1.4,
"typ": 1.67,
"max": 1.9,
"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C",
"source_page": 9,
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{
"name": "负输入阈值",
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"min": 1,
"typ": 1.23,
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"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C",
"source_page": 9,
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{
"name": "输入阈值迟滞",
"symbol": "VI(HYS)",
"kind": "electrical",
"unit": "V",
"min": 0.3,
"typ": 0.44,
"max": 0.5,
"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C",
"source_page": 9,
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{
"name": "输入高电平漏电流",
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"min": null,
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{
"name": "输入低电平漏电流",
"symbol": "IIL",
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"unit": "µA",
"min": -4,
"typ": null,
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"conditions": "VDDA=VDDB=5 V ±10%; VIL = 0 V at Ax or Bx",
"source_page": 9,
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},
{
"name": "共模瞬变抗扰度",
"symbol": "CMTI",
"kind": "electrical",
"unit": "kV/µs",
"min": 75,
"typ": 100,
"max": null,
"conditions": "VDDA=VDDB=5 V ±10%; VI = VDDI1 or 0 V, VCM = 1200 V; 图 7-3",
"source_page": 9,
"source": "datasheet"
},
{
"name": "最小脉宽",
"symbol": "PWmin",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
"max": null,
"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C",
"source_page": 13,
"source": "datasheet"
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{
"name": "传播延迟",
"symbol": "tPLH, tPHL",
"kind": "timing",
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"min": 5,
"typ": 8,
"max": 13,
"conditions": "VDDA=VDDB=5 V ±10%, TA=-40 to 125°C; 图 7-1",
"source_page": 13,
"source": "datasheet"
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{
"name": "脉冲宽度失真",
"symbol": "PWD",
"kind": "timing",
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"typ": null,
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"conditions": "VDDA=VDDB=5 V ±10%; |tPLH - tPHL|",
"source_page": 13,
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{
"name": "输出上升时间",
"symbol": "tr",
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"max": 4,
"conditions": "VDDA=VDDB=5 V ±10%; 图 7-1",
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{
"name": "输出下降时间",
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"kind": "timing",
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{
"name": "默认输出延迟时间从输入电源损耗",
"symbol": "tDO",
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"min": 8,
"typ": null,
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"conditions": "VDDA=VDDB=5 V ±10%; 图 7-2",
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{
"name": "启动时间",
"symbol": "tSU",
"kind": "timing",
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"min": 15,
"typ": null,
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"conditions": "VDDA=VDDB=5 V ±10%",
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{
"name": "电源电流 DC(A侧,H版本)",
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{
"name": "隔离电压 (UL 1577, W封装)",
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"max": 5000,
"conditions": "UL 1577; VTEST = VISO, t = 60 s (认证)",
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{
"name": "输出电压逻辑高电平",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": 4.8,
"max": null,
"conditions": "VDDA=VDDB=5 V ±10%; IOH = -4mA; 图 7-1",
"source_page": 9,
"source": "datasheet"
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{
"name": "输出电压逻辑高电平",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
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