CA-IS3721LW

{
  "slug": "ca-is3721lw",
  "version": "0.1.0",
  "type": "component",
  "description": "Chipanalog Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "signal isolation devices",
    "ca-is3721lw",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ca-is3721lw.kicad_sym",
    "ca-is3721lw.kicad_mod",
    "ca-is3721lw.glb",
    "ca-is3721lw.step",
    "ca-is3721lw.lbr",
    "docs/hero.png",
    "docs/ca-is3721lw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ca-is3721lw-hero.glb",
    "ca-is3721lw-hero.overlay.json",
    "ca-is3721lw-etched.glb"
  ],
  "component": {
    "mpn": "CA-IS3721LW",
    "manufacturer": "Chipanalog",
    "package": "SOIC-16-300mil",
    "pin_count": 16,
    "category": "Signal Isolation Devices",
    "subcategory": "Digital Isolators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603030905703313408",
    "parts": {
      "symbol": "ca-is3721lw.kicad_sym",
      "footprint": "ca-is3721lw.kicad_mod",
      "model_3d": "ca-is3721lw-hero.glb",
      "model_3d_plain": "ca-is3721lw-etched.glb",
      "model_3d_step": "ca-is3721lw-etched.step",
      "model_3d_step_plain": "ca-is3721lw.step",
      "lbr": "ca-is3721lw.lbr"
    },
    "distributor_links": {
      "lcsc": "C3028819"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T19:23:38Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GNDA",
        "type": "power_in",
        "description": "A-side ground reference for the A-side supply and logic pins."
      },
      {
        "number": "2",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "3",
        "name": "VDDA",
        "type": "power_in",
        "description": "A-side supply voltage, recommended 2.375 V to 5.5 V (absolute maximum 6.0 V), with a 0.1 µF to 1 µF bypass capacitor required."
      },
      {
        "number": "4",
        "name": "VI1",
        "type": "input",
        "description": "A-side logic input of the forward channel; Schmitt-trigger input with VIH minimum 2.0 V and VIL maximum 0.8 V."
      },
      {
        "number": "5",
        "name": "VO2",
        "type": "output",
        "description": "A-side logic output of the reverse channel, with typical 50 Ω output impedance and recommended IOH/IOL up to 4 mA at a 5 V supply."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "7",
        "name": "GNDA",
        "type": "power_in",
        "description": "A-side ground reference for the A-side supply and logic pins."
      },
      {
        "number": "8",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "9",
        "name": "GNDB",
        "type": "power_in",
        "description": "B-side ground reference for the B-side supply and logic pins, isolated from GNDA."
      },
      {
        "number": "10",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "11",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "12",
        "name": "VI2",
        "type": "input",
        "description": "B-side logic input of the reverse channel; Schmitt-trigger input with positive threshold 1.4 V to 1.9 V and negative threshold 1.0 V to 1.4 V at 5 V."
      },
      {
        "number": "13",
        "name": "VO1",
        "type": "output",
        "description": "B-side logic output of the forward channel; on loss of input-side power the L-suffix device drives this output low (default-low fail-safe), with default output delay typically 8 ns to 12 ns."
      },
      {
        "number": "14",
        "name": "VDDB",
        "type": "power_in",
        "description": "B-side supply voltage, recommended 2.375 V to 5.5 V (absolute maximum 6.0 V), with a 0.1 µF to 1 µF bypass capacitor required."
      },
      {
        "number": "15",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; may be left floating, tied to VDD, or tied to GND."
      },
      {
        "number": "16",
        "name": "GNDB",
        "type": "power_in",
        "description": "B-side ground reference for the B-side supply and logic pins, isolated from GNDA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin map for CA-IS3721 derived from Table 6-1 (SOIC16-WB) because the Figure 6-1 text layer is garble; Table 6-1 lists pin 5 as 'VI2/VO2/NC1' and pin 12 as 'VI2/VO2'; for the CA-IS3721 the pin 5 entry is; Pins 2, 6, 8, 10, 11 and 15 are NC on this part. The datasheet says they may float or connect to VDD",
          "3/16 pins cited to the wrong page (name found elsewhere): ['5:VO2@p10', '12:VI2@p10', '13:VO1@p10']"
        ],
        "pages_sent": 25,
        "cost_usd": 0.1233,
        "at": "2026-10-18T19:21:28"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603030905703313408",
        "pages": 25,
        "sha256": "e0570f476c6a89dd",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ca-is3721lw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ca-is3721lw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4a04cc1deb0b5050e635f3f4296fe8bf60a890384e71db7e6f3ec4dd1303229c",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}