CA-IS3721LS

{
  "slug": "ca-is3721ls",
  "version": "0.1.0",
  "type": "component",
  "description": "Chipanalog Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "ca-is3721ls",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ca-is3721ls.kicad_sym",
    "ca-is3721ls.kicad_mod",
    "ca-is3721ls.glb",
    "ca-is3721ls.step",
    "ca-is3721ls.lbr",
    "docs/hero.png",
    "docs/ca-is3721ls-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ca-is3721ls-hero.glb",
    "ca-is3721ls-hero.overlay.json",
    "ca-is3721ls-etched.glb"
  ],
  "component": {
    "mpn": "CA-IS3721LS",
    "manufacturer": "Chipanalog",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Digital Isolators",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/c67eb6a9de8f9931d1e2eb5742474cd5.pdf",
    "parts": {
      "symbol": "ca-is3721ls.kicad_sym",
      "footprint": "ca-is3721ls.kicad_mod",
      "model_3d": "ca-is3721ls-hero.glb",
      "model_3d_plain": "ca-is3721ls-etched.glb",
      "model_3d_step": "ca-is3721ls-etched.step",
      "model_3d_step_plain": "ca-is3721ls.step",
      "lbr": "ca-is3721ls.lbr"
    },
    "distributor_links": {
      "lcsc": "C5121216"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T03:07:49Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDDA",
        "type": "power_in",
        "description": "Side A supply voltage, 2.375 V to 5.5 V recommended operating range, bypassed with a 0.1 µF to 1 µF capacitor."
      },
      {
        "number": "2",
        "name": "VI1",
        "type": "input",
        "description": "Side A logic input for channel 1 (forward channel, transmitted to VO1 on side B) with Schmitt-trigger input."
      },
      {
        "number": "3",
        "name": "VO2",
        "type": "output",
        "description": "Side A logic output for channel 2 (reverse channel, driven from VI2 on side B)."
      },
      {
        "number": "4",
        "name": "GNDA",
        "type": "power_in",
        "description": "Side A ground reference."
      },
      {
        "number": "5",
        "name": "GNDB",
        "type": "power_in",
        "description": "Side B ground reference."
      },
      {
        "number": "6",
        "name": "VI2",
        "type": "input",
        "description": "Side B logic input for channel 2 (reverse channel, transmitted to VO2 on side A) with Schmitt-trigger input."
      },
      {
        "number": "7",
        "name": "VO1",
        "type": "output",
        "description": "Side B logic output for channel 1 (forward channel, follows VI1 on side A)."
      },
      {
        "number": "8",
        "name": "VDDB",
        "type": "power_in",
        "description": "Side B supply voltage, 2.375 V to 5.5 V recommended operating range, bypassed with a 0.1 µF to 1 µF capacitor."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 6-2 row for pin 7 describes CA-IS3721 as 'A side logic input', which contradicts the same tabl; The pin-name labels for the CA-IS3721 SOIC-8 are taken from the top-view figure text, which is garbl"
        ],
        "pages_sent": 25,
        "cost_usd": 0.2207,
        "at": "2026-10-23T03:07:31"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/c67eb6a9de8f9931d1e2eb5742474cd5.pdf",
        "pages": 25,
        "sha256": "3f67653faec8df59",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ca-is3721ls.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ca-is3721ls-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "bcb3c983ace85ccc0b403a94379e1f4dde2256c4f2cb48c77949ecdd63496142",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}