main
Ray Publish 0.1.0 d53fd55
{
  "slug": "ca-is3721lg",
  "version": "0.1.0",
  "type": "component",
  "description": "Chipanalog Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "ca-is3721lg",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ca-is3721lg.kicad_sym",
    "ca-is3721lg.kicad_mod",
    "ca-is3721lg.glb",
    "ca-is3721lg.step",
    "ca-is3721lg.lbr",
    "docs/hero.png",
    "docs/ca-is3721lg-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ca-is3721lg-hero.glb",
    "ca-is3721lg-hero.overlay.json",
    "ca-is3721lg-etched.glb"
  ],
  "component": {
    "mpn": "CA-IS3721LG",
    "manufacturer": "Chipanalog",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Digital Isolators",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/1f93ce9099eee71a46d9ac7c52c62950.pdf",
    "parts": {
      "symbol": "ca-is3721lg.kicad_sym",
      "footprint": "ca-is3721lg.kicad_mod",
      "model_3d": "ca-is3721lg-hero.glb",
      "model_3d_plain": "ca-is3721lg-etched.glb",
      "model_3d_step": "ca-is3721lg-etched.step",
      "model_3d_step_plain": "ca-is3721lg.step",
      "lbr": "ca-is3721lg.lbr"
    },
    "distributor_links": {
      "lcsc": "C7420568"
    },
    "distributor_check": {
      "checked_at": "2026-11-05T15:14:27Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDDA",
        "type": "power_in",
        "description": "Side A supply voltage; the recommended operating range is 2.375 V to 5.5 V with 3.3 V typical."
      },
      {
        "number": "2",
        "name": "VI1",
        "type": "input",
        "description": "Side A logic input for channel 1 on the CA-IS3721; it is TTL-compatible with VIH minimum 2.0 V and VIL maximum 0.8 V."
      },
      {
        "number": "3",
        "name": "VO2",
        "type": "output",
        "description": "Side A logic output for channel 2 on the CA-IS3721 (reverse-direction channel); recommended IOH is -4 mA and IOL is 4 mA at 5 V (-2 mA / 2 mA at 3.3 V, -1 mA / 1 mA at 2.5 V)."
      },
      {
        "number": "4",
        "name": "GNDA",
        "type": "power_in",
        "description": "Side A ground reference point; all Side A signal and supply voltages are referenced to this pin."
      },
      {
        "number": "5",
        "name": "GNDB",
        "type": "power_in",
        "description": "Side B ground reference point, isolated from GNDA by the isolation barrier; all Side B signal and supply voltages are referenced to this pin."
      },
      {
        "number": "6",
        "name": "VI2",
        "type": "input",
        "description": "Side B logic input for channel 2 on the CA-IS3721; it is TTL-compatible with VIH minimum 2.0 V and VIL maximum 0.8 V."
      },
      {
        "number": "7",
        "name": "VO1",
        "type": "output",
        "description": "Side B logic output for channel 1 on the CA-IS3721; recommended IOH is -4 mA and IOL is 4 mA at 5 V (-2 mA / 2 mA at 3.3 V, -1 mA / 1 mA at 2.5 V)."
      },
      {
        "number": "8",
        "name": "VDDB",
        "type": "power_in",
        "description": "Side B supply voltage; the recommended operating range is 2.375 V to 5.5 V with 3.3 V typical."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The CA-IS3721 8-pin figure in the extracted text is scrambled (pin rows and the part label are out o; The package hint 'SOIC-8' is ambiguous. CA-IS3721LG maps to SOIC8-WB (G) per the ordering table; the; Output drive limits are quoted from the recommended operating conditions table (page 6); the datashe"
        ],
        "pages_sent": 25,
        "cost_usd": 0.107,
        "at": "2026-11-05T15:14:14"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/1f93ce9099eee71a46d9ac7c52c62950.pdf",
        "pages": 25,
        "sha256": "700fbcc87277736d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ca-is3721lg.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-11-05",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ca-is3721lg-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1ca0a9c17a8762c2418d4234f0def53cb599c3c080d9d6f7efd30b5fd58b26f4",
        "checked": "2026-11-05",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}