main
Ray ca-is3720hg: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 2947cdb
{
  "slug": "ca-is3720hg",
  "version": "0.1.0",
  "type": "component",
  "description": "Chipanalog Digital Isolators, SOIC-8-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "comm-uart",
    "ca-is3720hg"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ca-is3720hg.kicad_sym",
    "ca-is3720hg.kicad_mod",
    "ca-is3720hg.glb",
    "ca-is3720hg.step",
    "ca-is3720hg.lbr",
    "docs/hero.png",
    "docs/ca-is3720hg-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ca-is3720hg-etched.step"
  ],
  "visibility": {
    "public": true
  },
  "author": {
    "name": "Ray"
  },
  "component": {
    "mpn": "CA-IS3720HG",
    "manufacturer": "Chipanalog",
    "package": "SOIC-8-300mil",
    "pin_count": 8,
    "category": "Digital Isolators",
    "parts": {
      "symbol": "ca-is3720hg.kicad_sym",
      "footprint": "ca-is3720hg.kicad_mod",
      "model_3d": "ca-is3720hg-etched.glb",
      "model_3d_plain": "ca-is3720hg.glb",
      "model_3d_step": "ca-is3720hg-etched.step",
      "model_3d_step_plain": "ca-is3720hg.step",
      "lbr": "ca-is3720hg.lbr"
    },
    "pins": [
      {
        "number": "1",
        "name": "VDDA",
        "type": "power_in",
        "description": "A-side supply voltage. Operating range 2.375 V to 5.5 V (typ 3.3 V/5 V). Decouple to GNDA with a low-ESR ceramic capacitor placed close to the pin."
      },
      {
        "number": "2",
        "name": "VI1",
        "type": "input",
        "description": "A-side logic input for channel 1. Schmitt-trigger CMOS input (VIT+ typ 1.67 V, VIT- typ 1.23 V, hysteresis typ 0.44 V). Signal is transmitted across the isolation barrier to VO1 on the B side."
      },
      {
        "number": "3",
        "name": "VI2",
        "type": "input",
        "description": "A-side logic input for channel 2. Schmitt-trigger CMOS input (same thresholds as VI1). Signal is transmitted across the isolation barrier to VO2 on the B side."
      },
      {
        "number": "4",
        "name": "GNDA",
        "type": "power_in",
        "description": "A-side ground reference. All A-side voltages (VDDA, VI1, VI2) are referenced to this pin. Isolated from GNDB by the internal SiO2 barrier."
      },
      {
        "number": "5",
        "name": "GNDB",
        "type": "power_in",
        "description": "B-side ground reference. All B-side voltages (VDDB, VO1, VO2) are referenced to this pin. Isolated from GNDA by the internal SiO2 barrier."
      },
      {
        "number": "6",
        "name": "VO2",
        "type": "output",
        "description": "B-side logic output for channel 2. Reconstructed CMOS copy of VI2. Drives VDDO−0.4 V high / 0.4 V low at ±4 mA (5 V supply). Output impedance ~50 Ω. Defaults HIGH on loss of input power or signal (H-suffix fail-safe)."
      },
      {
        "number": "7",
        "name": "VO1",
        "type": "output",
        "description": "B-side logic output for channel 1. Reconstructed CMOS copy of VI1. Drives VDDO−0.4 V high / 0.4 V low at ±4 mA (5 V supply). Output impedance ~50 Ω. Defaults HIGH on loss of input power or signal (H-suffix fail-safe)."
      },
      {
        "number": "8",
        "name": "VDDB",
        "type": "power_in",
        "description": "B-side supply voltage. Operating range 2.375 V to 5.5 V; sets the CMOS output swing on VO1/VO2. Decouple to GNDB with a low-ESR ceramic capacitor placed close to the pin."
      }
    ],
    "provenance": {
      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "distributor_links": {
      "lcsc": "C428881",
      "digikey": false,
      "mouser": false
    },
    "distributor_check": {
      "checked_at": "2026-10-05T18:54:53Z",
      "source": "Component Ocean /api/assign-pns + lcsc_map",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "models_3d": [
      {
        "file": "ca-is3720hg.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ca-is3720hg-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "eeda467ddd5d550a8fde1a200aa7f1d6e89f52eac35f7c31b2dbd46deb5dc59c",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}